Technique to suppress bitline leakage current

Details Technique to suppress bitline leakage current Technique to suppress bitline leakage current

2005-09-13

2008-08-19

Elms, Richard T. (Department: 2824)

Static information storage and retrieval

Read/write circuit

C365S182000, C365S202000, C365S203000

Reexamination Certificate

active

07414896

ABSTRACT:
Methods and apparatus that may help reduce standby current in memory devices are provided. By separating equalizing and precharging functions into separate circuit structures, current paths between a source of precharge voltage and a defective wordline (e.g., having an inadvertent short to a bitline due to a manufacturing defect) may be eliminated.

REFERENCES:
patent: 6480434 (2002-11-01), Lee
patent: 2004/0145959 (2004-07-01), Kuge et al.
patent: 2006/0092731 (2006-05-01), Kang et al.

Affiliated with

Also associated with

Rating

Technique to suppress bitline leakage current does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Technique to suppress bitline leakage current, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Technique to suppress bitline leakage current will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3998050