Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area
Reexamination Certificate
2008-03-25
2008-03-25
Ellis, Kevin L. (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Shared memory area
Reexamination Certificate
active
11195224
ABSTRACT:
A technique to perform concurrent updates to a shared data structure. At least one embodiment of the invention concurrently stores copies of a data structure within a plurality of local caches, updates the local caches with a partial result of a computation distributed among a plurality of processing elements, and returns the partial results to combining logic in parallel, which combines the partial results into a final result.
REFERENCES:
patent: 4099242 (1978-07-01), Houston et al.
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patent: 2001/0054058 (2001-12-01), Del Pino
patent: 2003/0163667 (2003-08-01), Barlow et al.
patent: 2005/0251575 (2005-11-01), Bayardo et al.
Kim Dae-hyun
Lee Victor W.
Nguyen Anthony D.
Smelyanskiy Mikhail
Ellis Kevin L.
Intel Corporation
Trop Pruner & Hu P.C.
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