Technique to enhance the yield of copper interconnections

Details Technique to enhance the yield of copper interconnections Technique to enhance the yield of copper interconnections

2005-02-01

2005-02-01

Wong, Edna (Department: 1753)

Electrolysis: processes, compositions used therein, and methods

Electrolytic coating

Coating selected area

C205S123000, C205S157000, C205S221000

Reexamination Certificate

active

06849173

ABSTRACT:
A method of forming an oxide free copper interconnect, comprising the following steps. A substrate is provided and a patterned dielectric layer is formed over the substrate. The patterned dielectric layer having an opening exposing a portion of the substrate. The opening having exposed sidewalls. A copper seed layer is formed over the sidewalls of the opening. The copper seed layer is subjected to an electrochemical technique to eliminate any copper oxide formed over the copper seed layer. A bulk copper layer is electrochemically plated over the copper-oxide-free copper seed layer, filling the opening and forming the oxide-free copper interconnect.

REFERENCES:
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patent: 6245676 (2001-06-01), Ueno
patent: 6258710 (2001-07-01), Rathore et al.
patent: 6287954 (2001-09-01), Ashley et al.
patent: 6531046 (2003-03-01), Morrissey et al.
patent: 20020074242 (2002-06-01), Morrissey et al.
patent: 20020100693 (2002-08-01), Lu et al.
patent: 1005078 (2000-05-01), None

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