Technique of fabricating integrated circuits having...

Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design

Reexamination Certificate

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C257S299000, C326S080000, C327S333000

Reexamination Certificate

active

06175952

ABSTRACT:

BACKGROUND OF THE INVENTION
The present invention relates to the field of integrated circuits, and more specifically, to improving the interfacing of integrated circuit in a mixed-voltage environment.
The integrated circuit business and semiconductor industry are continually driven to reduce cost, reduce power, and improve performance. The integrated circuit products include microprocessors, memories, programmable logic, programmable controllers, application specific integrated circuits, and many other types of integrated circuits. Price reduction is strongly driven by migrating products to scaled processes, which reduce die sizes and increase yields. Power reduction has been achieved by circuit design techniques, power management schemes, and parasitic scaling, among other factors. Performance improvement has resulted from design techniques, process enhancements, and parasitic scaling, among other factors.
Process technology is improving. Resulting from the continual scaling and shrinking of device geometries, device sizes and dimensions require the operating voltages to be scaled. Operating voltages have been scaled down from 5 volts to 3.3 volts. This has resulted in the need for mixed-voltage-mode systems. That is, integrated circuits will need to interface with various operating voltages. And, further reductions are expected in the future. This industry provides products and printed circuit boards (PCBS) that utilize both 3.3-volt and 5-volt integrated circuits and devices. It is expected that there may be a considerable transition period for the standard power supply to switch from one voltage level to a lower voltage level.
Process scaling is the dominant method of reducing the die cost. The cost is achieved by receiving higher yields associated with smaller die sizes. Presently, power supply voltages are being reduced as the scaling progresses towards device dimensions that necessitate the reduction of voltage differences across these dimensions.
All manufacturers have not switched over to the lower power supply, simultaneously. Thus the scaling of the operating voltage has resulted in creating a multiple voltage mode industry. Integrated circuit companies must provide products capable of addressing the needs during this intermediate phase before the industry transitions to a single lower power supply voltage. It is expected that this industry will require some time to successfully transition over to the lower power supply.
As can be seen, an improved technique of fabricating, and operating integrated circuits is needed to meet these demands. These integrated circuits should interact with devices that are designed to operate at either the standard or the new lower power supply. The integrated circuit should also provide a cost reduction path to customers that continue to design 5-volt-only systems. Integrated circuits should provide the manufacturer with the flexibility to chose the market to support with a minimum cost and the shortest time to market.
SUMMARY OF THE INVENTION
The present invention is a technique of fabricating an integrated circuit adaptable to a mixed-voltage mode environment. The same integrated circuit may be used in different operating modes depending on the particular option selected.
For example, in a first option, the integrated circuit will be compatible with a single supply voltage. In a second option, the integrated circuit will be compatible with a mixed voltage environment. The integrated circuit will be connected to a supply voltage. The integrated circuit will generate output compatible with this supply voltage. This integrated circuit will tolerate and interface with inputs at a voltage level above this supply voltage. In a third option, the integrated circuit will be compatible with an external supply voltage and interface with input and output at this external supply voltage. However, the integrated circuit will be manufactured using technology compatible with an internal supply voltage, where the internal supply voltage will be below that of the external supply voltage. These are only some example of the various options as there are numerous other variations.
The various options of the integrated circuit formed on the same integrated circuit. During the fabrication of the integrated circuit, the desired option is selected. This may be accomplished, for example, by selecting the appropriate metal masks. Other techniques include, to name a few, using programmable links, programmable fuses, programmable cells, and many others. The technique of the present invention reduces the costs of integrated circuits. The same design may be used for a variety of purposes and in a variety of voltage environments without needing to develop and design a specific integrated circuit for each mixed-voltage condition.
More specifically, a technique of the present invention for fabricating an integrated circuit includes the following steps. An integrated circuit core which is compatible with a first supply voltage is provided. A first interface is provided for the integrated circuit which is designed to handle input signals from external circuits compatible with the first supply voltage and generate output signals for external circuits compatible with the first supply voltage. A second interface is provided for the integrated circuit which is designed to handle input signals from external circuits compatible with a second supply voltage and generate output signals for external circuits compatible with the first supply voltage. A third interface is provided for the integrated circuit which is designed to handle input signals from external circuits compatible with the second supply voltage and generate output signals for external circuits compatible with the second supply voltage. The first interface, second interface, or third interface is selectively coupled to the core to obtain the desired characteristics for the integrated circuit.
Other objects, features, and advantages of the present invention will become apparent upon consideration of the following detailed description and the accompanying drawings, in which like reference designations represent like features throughout the figures.


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