Radiation imagery chemistry: process – composition – or product th – Imaging affecting physical property of radiation sensitive... – Making electrical device
Reexamination Certificate
2001-06-27
2003-12-09
Huff, Mark F. (Department: 1756)
Radiation imagery chemistry: process, composition, or product th
Imaging affecting physical property of radiation sensitive...
Making electrical device
C430S316000, C430S394000
Reexamination Certificate
active
06660456
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to manufacturing of integrated circuits and, more particularly, to forming openings on a semiconductor wafer.
2. Description of Related Art
In typical integrated circuit silicon wafer manufacturing, creation and integration of circuit patterns and openings or like features includes using a photolithography process or technique. Photolithography techniques are preferably used to form fine resist patterns to define circuits, openings and like features on the silicon wafer. In general, the process includes a light sensitive polymer film for a photoresist being applied to a wafer at a predetermined thickness. Light from a light source passes through a photomask having a predetermined mask (circuit) pattern thereon. The light passing through the photomask forms an aerial image which is projected onto the photoresist on the wafer forming the mask pattern on the photoresist. The photoresists (also known as “resists”) are exposed to light and subsequently processed by a development process to leave a patterned resist layer on the wafer. The resists are usually positive resists (the areas exposed to the light are removed by the subsequent development process) or negative resists (the areas not exposed to light are removed by the subsequent development process). The patterned resist layer then acts as an in-situ stencil for further processing, which can include Reactive Ion Etch (RIE), Ion Implant (II), Wet Etch (WE), and other processing steps. There are many variations on the technique of printing images in a photoresist film using light projected through a mask. The “standard” technique would be to print all the images at a given process level at one time through a single mask. After printing the images on the substrate, subsequent etching and/or depositions (or combinations thereof) are done to form the desired structures.
More specifically, existing methods or processes start with a silicon (or other kind of) semiconductor substrate or wafer with various films and possibly prior level patterns on it. This substrate can then be spin coated with a layer of photoresist. Sometimes a layer of anti-reflective coating is put onto the substrate before applying the photoresist. The substrate is then processed in some type of light exposure system. The areas of the photoresist where light strikes react with the light. The reaction varies depending on the type of photoresist used, the exposure wavelength used, the subsequent processing conditions, and other variables. The substrate is illuminated using a mask of some sort that intentionally illuminates some areas and intentionally prevents illumination in other areas. The substrate is subsequently processed to remove the photoresist in either the illuminated regions or the unilluminated regions depending on the photoresist type, the temperature and time of baking, and the type of chemical used to dissolve the designated areas of either reacted or unreacted photoresist (the chemical used for this dissolution is commonly known as “developer”). The remaining photoresist forms an in situ “stencil” or “mask” on the substrate. The next step in the process includes processing the substrate to form the desired feature type. In the case where the substrate has a dielectric level, and the desired features are small metal lines or small metal studs, the substrate is typically subjected to a reactive ion etch (RIE) process that would selectively etch the dielectric from areas of the substrate where the photoresist had been removed previously. The remaining photoresist is typically removed by an oxygen plasma strip process. Finally, a blanket metal may be deposited (either by evaporation or plating or some other suitable technique), and then the excess metal is removed by a chemical-mechanical polish operation.
In the fabrication of integrated circuit devices, high integration is desirable. To achieve this goal the various components in the integrated circuit are made with the smallest possible dimensions. Current semiconductor fabrication technologies available are able to fabricate integrated circuits down to and below 0.13 &mgr;m image size. The photolithography process is instrumental in the fabrication of semiconductors and related semiconductor structures such as, doped areas, and contact openings. In submicron integration, the photolithographic transfer of a pattern from a mask is highly critical. Various methods such as Optical Proximity Correction (OPC), and Phase Shift Masking (PSM), have been proposed to achieve high definition for the pattern transfer from a mask through photolithography onto a photoresist layer. Although existing methods (such as PSM) enhance the pattern definition in fabrication of integrated circuits they are complex and costly.
Typical integrated circuit manufacturing processes often involve the creation of openings in various materials by selective etching. For example, openings or trenches can be made in a substrate to provide isolation between individual devices or to provide capacitive charge storage. Other openings, such as vias, or windows, can be made in dielectric layers to facilitate connection between two layers of metallization or between a metallization layer and an active region of a transistor. Commonly, these openings are created by etching a material deposited on a semiconductor wafer to create openings. The openings may be subsequently filled with appropriate materials. For example, a trench may be filled with insulative material to facilitate inter-device isolation. The trench may also be used for capacitive storage, in which case the trench may be lined with one or more layers of insulator films and filled with conductive material. Vias may be subsequently filled with a conductive material, for example a metal providing a conductive link between two layers of metallization.
Another method uses computer software to compute the dimensions and positional deviations between the resulting patterns on the photoresist layer and the predefined patterns on the mask, and then, uses the data for correction of the size and position of the patterns on the mask. However, a disadvantage of this method is that it requires complex computing to obtain the needed corrections to the mask patterns, and can therefore be difficult or expensive to implement.
The manufacturing cost of a given integrated circuit is largely dependent upon the chip area required to implement desired functions. The chip area is defined by the geometries and sizes of the active components such as gate electrodes in metal oxide semiconductor (MOS) and diffused regions such as source and drain regions and bipolar emitters and base regions. These geometries and sizes are often dependent upon the current photolithographic equipment and materials available in the industry.
Conventional technology used in forming contacts and vias has been done primarily through improvements in photolithography capability. The dependency on the photolithography to achieve adequate projections of images or patterns onto the wafer surface is limited by the photolithography equipments' capability, especially as feature sizes continue to decrease.
In fabricating an integrated circuit, apertures, windows or vias are often formed in a layer of insulator material in order to provide a contact to a second layer to electrically connect the second layer to a third layer that is on an opposite side of the insulator layer. The functional area on a semiconductor device is valuable, and the dimensions of these apertures are often made as small as fabrication limitations allow. Therefore, it is necessary to precisely control the diameter of any aperture that is formed in a layer.
Current methods of photolithography in computer microchip miniaturization produce chips containing in the hundreds of thousands or more transistors. Fabrication of these features is dependent on the resolution or the optical system's ability to distinguish closely spaced objects. The resolution of the system is an impo
C. Li Todd M.
DeLio & Peterson LLC
Huff Mark F.
International Business Machines - Corporation
Mohamedulla Saleha
LandOfFree
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