Technique for strain engineering in Si-based Transistors by...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – Having schottky gate

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

Reexamination Certificate

active

07544551

ABSTRACT:
By incorporating an atomic species of increased covalent radius, which may at least partially substitute germanium, a highly efficient strain mechanism may be provided, in which the risk of stress relief due to germanium conglomeration and lattice defects may be reduced. The atomic species of increased radius, such as tin, may be readily incorporated by epitaxial growth techniques on the basis of tin hydride.

REFERENCES:
patent: 5548128 (1996-08-01), Soref et al.
patent: 2004/0253776 (2004-12-01), Hoffmann et al.
patent: 2005/0009282 (2005-01-01), Usuda et al.
patent: 2005/0035409 (2005-02-01), Ko et al.
patent: 2005/0070053 (2005-03-01), Sadaka et al.
patent: 2006/0163612 (2006-07-01), Kouvetakis et al.
patent: WO 2005/006447 (2005-01-01), None
patent: 2005/015609 (2005-02-01), None
Search Report Dated Mar. 19, 2007 in Serial No. PCT/US06/041559.
“Synthesis of Metastable Group-IV Allow Semiconductors by Ion Implantation and Ion-Beam-Induced Epitaxial Crystallization” by Kobayashi, et al; Applied Surface Science; vol. 100-101; Jul. 2, 1996; pp. 498-502.
“New IR Semiconductors in the Si-Ge-Sn System” by Kouvetakis, et al; First IEEE International Conference in Hong Kong; Sep. 29-Oct. 1, 2004; pp. 55-57.
“Pseudomorphic Sil-xSnx Alloy Films Grown by Molecular Beam Epitaxy on Si” by Shiryaev, et al; Applied Physics Letters; pp. 2287-2289; vol. 67, No. 16; Oct. 16, 1995.
“Band-Edge Photoluminescence From Pseudomorphic Si0.96Sn0.04 Alloy” by Khan, et al; Applied Physics Letters; vol. 68, No. 22, May 27, 1996; pp. 3105-2107.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Technique for strain engineering in Si-based Transistors by... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Technique for strain engineering in Si-based Transistors by..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Technique for strain engineering in Si-based Transistors by... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4094578

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.