Computer graphics processing and selective visual display system – Display driving control circuitry – Display power source
Reexamination Certificate
1999-04-26
2003-04-15
Hjerpe, Richard (Department: 2674)
Computer graphics processing and selective visual display system
Display driving control circuitry
Display power source
C345S204000, C345S213000, C348S441000
Reexamination Certificate
active
06549197
ABSTRACT:
CLAIM OF PRIORITY
This application makes reference to, incorporates the same herein, and claims all benefits accruing under 35 U.S.C. §119 from an application for APPARATUS FOR STABILIZING PICTURE OUTPUT IN VIDEO DISPLAY APPARATUS, AND STABILIZING METHOD THEREFOR earlier filed in the Korean Industrial Property Office on Jun. 5, 1998 and there duly assigned Ser. No. 20954/1998.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a technique for stabilizing the picture output in a video display apparatus. More specifically, the present invention relates to an apparatus and a method for stabilizing the picture output in a video display apparatus, in which the resolution of the video mode supplied from the PC is converted into a resolution of a pre-set video mode, thereby making it possible to output stabilized pictures.
2. Description of the Related Art
Generally, a video display apparatus has a microcomputer which functions as follows. That is, the video mode provided by a PC is judged by utilizing horizontal/vertical synchronizing signals which are supplied together with RGB signals from the PC. Further, in accordance with the judged video mode, horizontal/vertical synchronizing outputs of the RGB signals from the PC are controlled, thereby displaying normal pictures.
Further, the microcomputer checks as to the power-on-off status of the video apparatuses. If the checking shows that the power has been turned on, it is made sure that the power is supplied to the various circuit blocks of the video apparatus, so that normal pictures can be outputted based on the RGB signals.
The video display apparatus has a format converter module which communicates with the microcomputer and converts the resolution of the video mode (supplied from the PC) into a resolution of a pre-set video mode.
Under this condition, the communication method is a PC method. That is, the control data and the clock signals which are based on the video mode supplied from the microcomputer are transmitted to a microcomputer of the format converter module.
The format converter module converts the resolution of the video mode of the PC to a resolution of a pre-set VGA mode. Thus the RGB signals control the cathode ray tube, with the result that pictures are displayed on the screen of the video apparatus. That is, if the PC provides RGB signals based on a video mode such as VGA (640×480) or SVG (800×600) or XGA (1024×768), then the format converter converts the resolution of the RGB signals to a pre-set VGA mode.
That is, the format converter system converts the resolution of the final pictures of the video display apparatus to a resolution of a pre-set VGA mode, regardless of the resolution of the video mode which is selected by the PC.
Under this condition, the two sets of power control signals, the control data and the clock signals which are outputted from the microcomputer to the downstream blocks are simultaneously outputted without any time gap.
Therefore, it is not known which circuit begins to operate first among the circuit blocks (receiving the power control signals) and the format converter module (receiving the power control signals, the control data and the clock signals). In this unknown state, the resolution of the video mode from the PC is converted to a pre-set resolution.
That is, in a state with the digital system not stabilized, the format converter module operates in accordance with the control data of the microcomputer. As a result, not only system errors are liable to occur, but also a transition phenomenon occurs in the analog and digital systems. Consequently, the overall system becomes unstable, and unstable pictures are displayed.
SUMMARY OF THE INVENTION
The present invention is intended to overcome the disadvantages of the above-described technique.
Therefore, it is an object of the present invention to provide an apparatus and a method for stabilizing the video output in a video display apparatus, in which a microcomputer sequentially outputs signals, respective circuit blocks and a format converter of the video display apparatus are sequentially driven in accordance with the output signals of the microcomputer, and the resolution of the video mode of the PC is converted into a resolution of a pre-set video mode, so that RGB signals can control a cathode ray tube in a stable manner.
In achieving the above object, the apparatus for stabilizing a picture output in a video display apparatus according to the present invention includes: a microcomputer for sequentially outputting first power control signals, second power control signals, control data and clock signals with time gaps of certain magnitudes; a first power supply section driven by the first power control signal of the microcomputer for generating power to be supplied to respective blocks of the video display apparatus; a second power supply section driven by the second power control signal of the microcomputer for generating power to be supplied to a format converter module; and the format converter module being driven by power from the second power supply section to convert resolutions of RGB signals based on a pre-set video mode upon receipt of the control data from the microcomputer.
In another aspect of the present invention, the method of stabilizing a picture output in a video display apparatus according to the present invention includes the steps of: recognizing a power-on, and outputting a first power control signal; carrying out a counting for N seconds by an internal counter after outputting the first power control signal to output a second power control signal; and carrying out a counting for N/4 seconds by an internal counter after the outputting of the second power control signal to output a control data and a clock signal.
REFERENCES:
patent: 5241281 (1993-08-01), Wilkes et al.
patent: 5594467 (1997-01-01), Marlton et al.
patent: 5835792 (1998-11-01), Wise et al.
patent: 6097437 (2000-08-01), Hwang
patent: 6215467 (2001-04-01), Suga et al.
Bushnell , Esq. Robert E.
Hjerpe Richard
Nguyen Francis
Samsung Electronics Co,. Ltd.
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