Technique for reducing etch damage during the formation of...

Details Technique for reducing etch damage during the formation of... Technique for reducing etch damage during the formation of...

2007-12-18

2007-12-18

Vinh, Lan (Department: 1765)

Semiconductor device manufacturing: process

Chemical etching

Combined with coating step

C438S638000, C438S706000, C438S735000

Reexamination Certificate

active

11380094

ABSTRACT:
By performing a first common etch process for forming a via opening and a delineation trench or open area in a metallization layer with different removal rates, the etch front in the delineation trench or open area may be delayed, thereby significantly reducing the probability of wafer arcing. Subsequently, the delineation trench or open area may be etched down to the respective etch stop layer in a further common etch process, during which a trench is formed above the via opening.

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