Technique for passivating semiconductor devices

Details Technique for passivating semiconductor devices Technique for passivating semiconductor devices

1976-09-09

1978-03-07

Ozaki, G.

Metal treatment

Process of modifying or maintaining internal physical...

Chemical-heat removing or burning of metal

427 93, H01L 21225

Patent

active

040778193

ABSTRACT:
The specification discloses a technique for passivating a semiconductor device which includes exposing a P-N junction in a multilayered semiconductor body. A mixture of glass and gold is prepared and applied to the exposed P-N junction. A mixture is fired to fuse the glass and gold on the semiconductor body. The carrier lifetime degrading characteristics of the gold reduces the current leakage at the exposed P-N junction. The technique substantially improves the voltage capacity and stability of semiconductor switching devices.

REFERENCES:
patent: 3132408 (1964-05-01), Pell
patent: 3147152 (1964-09-01), Mendel
patent: 3617398 (1971-11-01), Bilous et al.
patent: 3632434 (1972-01-01), Hutson
patent: 3658584 (1972-04-01), Schmidt
patent: 3783049 (1974-01-01), Sandera
patent: 3789023 (1974-01-01), Ritchie
patent: 3941625 (1976-03-01), Kennedy et al.

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