I/O protocol for highly configurable multi-node processing syste

Details I/O protocol for highly configurable multi-node processing syste I/O protocol for highly configurable multi-node processing syste

1998-02-06

2000-08-15

Asta, Frank J.

Electrical computers and digital processing systems: processing

Processing architecture

395500, 395200, 395250, 395600, 395172, 395152, 709221, 709224, 709239, 709217, 709215, 3642289, 3642284, 710 36, 710131, G06F 15163, G06F 1517

Patent

active

061051225

ABSTRACT:
A method for transferring data from a first node to a second node in a multi-processor system is described. The multi-processor system comprises a plurality of nodes coupled to an interconnect fabric via an interconnect fabric interface, the nodes comprising a compute node and an I/O node, the I/O node coupled to a plurality of data storage devices. The method comprises the steps of generating a I/O request packet in a first node in response to an I/O request from an application executing in a first node, transmitting the data request packet to the second node via the interconnect fabric, and executing the destination interconnect channel program to extract the debit ID to transfer the data request to the second node buffer. In one embodiment, the I/O packet includes a data transfer request, an interconnect destination channel program, a first debit ID designating a second node buffer where the data request will be transmitted, and a first credit ID designating a first node buffer where the data responsive to the I/O request will be transmitted.

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