Electrical computers and digital processing systems: memory – Addressing combined with specific memory configuration or... – For multiple memory modules
Patent
1995-06-07
1998-10-27
Chan, Eddie P.
Electrical computers and digital processing systems: memory
Addressing combined with specific memory configuration or...
For multiple memory modules
711104, 711168, 345517, 345518, 36523004, 36523005, 36518904, G06F 1200
Patent
active
058290079
ABSTRACT:
A RAM implementation of asynchronous swing buffering is provided in which two buffers are operated asynchronously; one is written while the other is read. Accordingly, this allows for a data stream having a fast rate of through-put to be resynchronized to another rate, while still maintaining a desired rate. In the invention, the write control and read control both have state indicators for communicating which buffer they are using and whether the controls are waiting for access or are, in fact, accessing that buffer.
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Barnes David Andrew
Barnes Mark
Birch Nicholas
Claydon Anthony Peter John
Dewar Kevin D.
Bickel Arthur S.
Bragdon Reginald G.
Braun Robert T.
Chan Eddie P.
Clark Ronald J.
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