Technique for forming metal lines in a semiconductor by...

Details Technique for forming metal lines in a semiconductor by... Technique for forming metal lines in a semiconductor by...

2007-12-07

2011-11-15

Vu, Hung (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Of specified material other than unalloyed aluminum

C257S751000, C257S752000

Reexamination Certificate

active

08058731

ABSTRACT:
By moderately introducing defects into a highly conductive material, such as copper, the resistance versus temperature behavior may be significantly modified so that enhanced electromigration behavior and/or electrical performance may be obtained in metallization structures of advanced semiconductor devices. The defect-related portion of the resistance may be moderately increased so as to change the slope of the resistance versus temperature curve, thereby allowing the incorporation of impurity atoms for enhancing the electromigration endurance while not unduly increasing the overall resistance at the operating temperature or even reducing the corresponding resistance at the specified operating temperature. Thus, by appropriately designing the electrical resistance for a target operating temperature, both the electromigration behavior and the electrical performance may be enhanced.

REFERENCES:
patent: 5077005 (1991-12-01), Kato
patent: 6117770 (2000-09-01), Pramanick et al.
patent: 1 376 680 (2004-01-01), None
patent: WO 02/099874 (2002-12-01), None
Foreign associate transmittal letter dated Jan. 15, 2008.
Translation of Official Communication issued Nov. 13, 2007.
Glasow, A von, Fischer A.H., Steinlesberger, G., “Using the Temperature Coefficient of the Resistance(TCR)as Early Reliability Indicator for Stressvoiding Risks in CU Interconnects” IEEE 03CH37400. 41st Annual International Reliability Physics Symposium, Dallas, TX 2003.

Affiliated with

Also associated with

Rating

Technique for forming metal lines in a semiconductor by... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Technique for forming metal lines in a semiconductor by..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Technique for forming metal lines in a semiconductor by... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4301359