Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2000-12-28
2003-07-08
Siek, Vuthe (Department: 2825)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
C716S030000, C716S030000, C716S030000, C716S030000
Reexamination Certificate
active
06591399
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates generally to the design of circuit boards and circuit components and, more particularly, to a technique for facilitating the circuitry design process to minimize power consumption. Furthermore it is designed to minimize density and maximize throughput of the overall system. The tool looks into architectural trade—offs and analysis which can be implemented early in the product design cycle.
BACKGROUND OF THE INVENTION
The present state of the art in development tools includes such software tools as impedance calculators, Design ARchitecture Tool (DART), ALLEGRO, FLOWTHERM, and Sysvansis. These tools are all configured to assist a designer in designing circuitry. The tools are capable of providing system characteristics such as power, impedance, throughput, and density based on the circuit design under evaluation.
The aforementioned systems suffer from difficulties including the inability to provide alternative designs and tradeoff information associated with the alternative designs. The systems also frequently have inadequate emerging technology information to provide acceptable options. Furthermore, while prior art tools are frequently used to evaluate subsystems, system level analysis has been inadequate.
In view of the foregoing, it would be desirable to provide a technique for facilitating the design of circuit boards and circuit components which overcomes the above-described inadequacies and shortcomings. More particularly, it would be desirable to provide a technique for facilitating system design in order to provide a minimum amount of technology while simultaneously minimizing power consumption in an efficient and cost effective manner.
SUMMARY OF THE INVENTION
According to the present invention, a technique for facilitating system design including circuit board and circuit component design is provided. In one embodiment, the technique is realized by a method for facilitating circuitry design. The method comprising the step of inputting preliminary design specifications and goals into a processing system. The method further comprises the steps of predicting subsystem performance based on input design specifications and providing alternative subsystem designs based on the input goals if requested.
The method further comprise estimating power consumption based on the input design specifications and providing additional design options upon request. The method also comprises the step of providing system tradeoff and option information based on the input goals, the input design specifications, and the output of the power consumption and density estimate and the subsystem performance prediction in order to provide minimum required technology for minimizing power consumption goal.
In accordance with other aspects of the present invention, a system is provided for facilitating circuitry design. The system comprises user interface tools for allowing a user to input preliminary design characteristics and goals and at least one technology library for storing printed circuit board and component data, wherein the printed circuit board and component data include power consumption information. The system further comprises processing tools for implementation on a processor, the processing tools comprising power and density estimation tools, subsystem performance estimation tools, and system performance analysis tools.
In accordance with further aspects of the present invention, an article of manufacture for facilitating circuitry design is provided. The article of manufacture comprises at least one processor readable carrier and instructions carried on the at least one carrier wherein the instructions are configured to be readable from the at least one carrier by at least one processor and thereby cause the at least one processor to operate so as to receive input preliminary design specifications and goals into a processing system. The processor further operates on the carrier so as to predict subsystem performance based on input design specifications and provide alternative subsystem designs based on the input goals if requested and estimate power consumption and density based on the input design specifications and provide additional design options upon request. The processor also operates on the carrier to provide system tradeoff and option information based on the input goals, the input design specifications, and the output of the power consumption and density estimate and the subsystem performance prediction in order to provide minimum required technology for minimizing power consumption.
In a still further aspect of the invention, a signal embodied in a carrier wave is provided. The signal represents sequences of instructions which, when executed by at least one processor, cause the at least one processor to facilitate circuitry design by performing a plurality of steps including receiving input preliminary design specifications and goals into a processing system, predicting subsystem performance based on input design parameters and providing alternative subsystem designs based on the input design specifications and input goals if requested and estimating power consumption and density based on the input design parameters and providing additional design options upon request. The steps further include providing system tradeoff and option information based on the input goals, the input design specifications, and the output of the power consumption and density estimate and the subsystem performance sub-routine in order to provide minimum required technology for minimizing power consumption.
The present invention will now be described in more detail with reference to exemplary embodiments thereof as shown in the appended drawings. While the present invention is described below with reference to preferred embodiments, it should be understood that the present invention is not limited thereto. Those of ordinary skill in the art having access to the teachings herein will recognize additional implementations, modifications, and embodiments, as well as other fields of use, which are within the scope of the present invention as disclosed and claimed herein, and with respect to which the present invention could be of significant utility.
REFERENCES:
patent: 5801958 (1998-09-01), Dangelo et al.
patent: 5880971 (1999-03-01), Dangelo et al.
patent: 5910897 (1999-06-01), Dangelo et al.
patent: 6407434 (2002-06-01), Rostoker et al.
Ellis Amanda L.
Watkins John H.
Wyrzykowska Aneta O.
Hunton & Williams LLP
Siek Vuthe
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