Technique for etching oxides and/or insulators

Etching a substrate: processes – Nongaseous phase etching of substrate – Irradiating – ion implanting – alloying – diffusing – or...

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C438S958000

Reexamination Certificate

active

06358430

ABSTRACT:

FIELD OF THE INVENTION
The present invention pertains to etching electrical insulators and more specifically to etching electrical insulators, such as oxides, on semiconductor surfaces.
BACKGROUND OF THE INVENTION
A major technique used today, and especially in the semiconductor industry, is to deposit or grow a layer of material and then etch away unwanted portions. In general, etching processes can be performed by wet or dry etching procedures. Typically, wet chemistry produces far too much undercutting (i.e. horizontal etching) and is, therefore, not considered for the desired applications. However, some materials are difficult to etch with dry chemistries. Sometimes these materials can be etched, but with little selectivity between the material being etched and the material which is to remain.
Using Reactive Ion Etching (RIE), it is difficult to etch materials that contain elements that are either very high mass (such as Ba, Sr, Pt, etc.) or highly reactive (such as (Ba, Sr, Ca, etc.). Finding volatile byproducts that can be formed during the RIE process is the key to etch selectivity. It is very difficult to etch earth metal oxides (e.g. SrTiO
3
, BaTiO
3
, and BaSrTiO
3
) in a reactive ion etcher because Sr and Ti don't make volatile byproducts. So far, the solution has been to use a largely physical etch condition with little or no selectivity. At present, gas chemistry is inferior for these high dielectric constant (high K) materials.
The desired etch characteristics are vertical sidewalls (large differential etch rates), reasonable etch rates, and high chemical selectivity to other materials that are not to be etched. Vertical sidewalls greater than approximately 80° and selectivity greater than 3-4 are fairly common. By using a high “physical” component to the RIE etch (e.g. sputtering), near vertical sidewalls are achievable, however, chemical selectivity suffers.
It is desirable, therefore, to provide a new method of etching to solve these problems. The most desirable ingredients are: etch selectivity (vertical); etch selectivity (horizontal); and anisotropy. In a specific application the etching of earth metal oxides (including barium titanate, barium strontium titanate, or strontium titanate) which is deposited directly on silicon is desirable. Further, during the etching, any strontium titanate under a gate electrode should remain.
It is an object of the present invention to provide a new and improved method of etching electrical insulators.
It is another object of the present invention to provide a new and improved method of etching electrical insulators and specifically oxides.
It is still another object of the present invention to provide a new and improved method of etching electrical insulators with improved vertical etch selectivity, horizontal etch selectivity, and anisotropy.
It is yet another object of the present invention to provide a new and improved method of etching electrical insulators with improved etch rates.
It is a further object of the present invention to provide a new and improved method of etching earth metal oxides, including SrTiO
3
, BaTiO
3
or BaSrTiO
3
, and more specifically a new and improved method of etching earth metal oxides, and more specifically strontium titanates, on silicon.
SUMMARY OF THE INVENTION
The above objects and others are realized and the above problems and others are at least partially solved by a method of etching a layer of electrical insulating material in which a layer of electrical insulating material on a supporting surface, such as a semiconductor substrate, is immersed in an etching solution, while using a passivating material at the surface of the layer of electrical insulating material to prevent the etching solution from operating on the electrical insulating material, and directing light onto the surface of the layer of electrical insulating material at areas to be etched, so as to depassivate the passivating material and to etch the layer of electrical insulating material only at the surface receiving the light. A focused pattern or a light-stopping mask layer can be used to direct light. Further, a mixed solution is provided in which a passivating agent is present along with an etching agent. The passivating agent prevents the etching while no light (preferably UV light) is directed at the surface or in areas that the light does not reach. When (UV) light is directed at the surface, the surface passivation is disrupted and etching takes place.
The above objects and others are further realized and the above problems and others are at least partially solved by a more specific, preferred method of etching a layer of electrical insulating material in which a thin layer of strontium titanate is provided on a surface of a semiconductor substrate and an acid solution containing less than 1000 ppm of HF is used as the passivated etching solution. The layer of strontium titanate is immersed in the passivated etching solution and collimated light is directed onto the passivated surface of the layer of strontium titanate at areas to be etched. The collimated light depassivates the passivated surface of the strontium titanate and the passivated etching solution etches the layer of strontium titanate only at the surface receiving collimated light.


REFERENCES:
patent: 3808068 (1974-04-01), Johnson et al.
patent: 4597825 (1986-07-01), Freeouf et al.
patent: 5201989 (1993-04-01), Douglas et al.
patent: 5238529 (1993-08-01), Douglas
patent: 5385633 (1995-01-01), Russell et al.
patent: 5643472 (1997-07-01), Engelsberg et al.
patent: 5741431 (1998-04-01), Shih
patent: 5824206 (1998-10-01), Quinlan
“Laser-Induced Chemistry for Microelectronics”, Osgood et al.,Science,Feb. 15, 1985, pp. 709-714.
“Localized Laser Etching of Compound Semiconductors in Aqueous Solution”, Osgood et al.,Appl. Phys. Lett.40(5), Mar. 1, 1982, pp. 391-393.
“A Review of Laser-Microchemical Processng”, Ehrlich et al.,J. Vac. Sci. Technol.. B1(4), Oct.-Dec. 1983, pp. 969-984.
“Laser-Induced Microscopic Etching of GaAs and InP”, Ehrlich et al.,Appl. Phys. Lett.36(8), Apr. 15, 1980, pp. 698-700.
“Patterned, Photo-Driven Cryoetching of GaAs and AIGaAs”, Shih et al.,J. Vac. Sci. Technol. B13(1), Jan./Feb. 1995, pp. 43-54.
“Conference on Lasers and Electo- Optics”.1988 Technical Digest Series,vol. 7, 3 pages.
“Science and Technology of Microfabrication”, Howard et al., Materials Research Society Symposia Proceedings, vol. 76, pp. 147-156.
“In-Situ Patterning: Selective Area Deposition and Etching”, Bernhardt et al., Materials Research Society Symposium Proceedings, vol. 158, pp. 325-330.
“Laser-Induced Chemical Etching of Silicon in Chlorine Atmosphere”, Mogyorosi et al.,Appl. Phys. A 45, pp. 293-299.
“Deep UV Photochemistry of Chemisorbed Monolayers: Patterned Coplanar Molecular Assemblies”, Dulcey et al.,Science,Apr. 26, 1991, pp. 551-554.
“Particle Removal From Semiconductor Surfaces Using a Photon-Assisted, Gas-Phase Cleaning Process”, Audrey C. Englesberg, Mat.Res.Soc. Symp. Proc., vol. 315, pp. 255-260.
“Laser Enhanced Etching in KOH”, von Gutfeld et al.,Appl. Phys. Lett. 40(4), Feb. 15, 1982, pp. 352-354.
“Photon-Assisted Dry Etching of GaAs”, Brewer et al.,Appl. Phys. Lett 45(4), Aug. 15, 1984, pp. 475-477.
“Proceedings of the Symposium on Dry Process”, Nishizawa et al.,Electronics and Dielectrics and Insulation Divisions,vol. 88-7, pp. 271-278.
“Design and Results for a 345 GHz SIS Focal Plane Array Using Planar Technology”, Legg et al.,International Journal of Infrared and Millimeter Waves,vol. 17, Nov. 1, 1996, pp. 79-90.
“The Photoelectrochemical Oxidation of (100), (111), and (111) n-InP and n-GaAs”, Kohl et al., Bell Laboratories, pp. 2288-2293.
“p-InP Photoetching”, Kohl et al., School of Chemical Engineering, Georgia Institute of Technology, pp. 3315-3316.
“The Photoelectrochmical Etching of (100) and (111) p-InP”, Kohl et al., School of Chemical Engineering, Georgia Institute of Technololgy, pp. 608-614.
“The Photoelectrochemical Oxidation of n-Si in Anhydrous HF-Acetonitrile”, Propst et al, School of Chemical Engineering, Ge

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Technique for etching oxides and/or insulators does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Technique for etching oxides and/or insulators, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Technique for etching oxides and/or insulators will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-2867595

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.