Electrical computers and digital data processing systems: input/ – Access arbitrating – Access prioritizing
Reexamination Certificate
2001-08-17
2004-01-27
Auve, Glenn A. (Department: 2181)
Electrical computers and digital data processing systems: input/
Access arbitrating
Access prioritizing
C709S241000
Reexamination Certificate
active
06684280
ABSTRACT:
FIELD OF THE INVENTION
This invention generally relates to microprocessors, and more specifically to improvements in access to shared resources, systems, and methods of making.
BACKGROUND
Microprocessors are general purpose processors which provide high instruction throughputs in order to execute software running thereon, and can have a wide range of processing requirements depending on the particular software applications involved.
Many different types of processors are known, of which microprocessors are but one example. For example, Digital Signal Processors (DSPs) are widely used, in particular for specific applications, such as mobile processing applications. DSPs are typically configured to optimize the performance of the applications concerned and to achieve this they employ more specialized execution units and instruction sets. Particularly in applications such as mobile telecommunications, but not exclusively, it is desirable to provide ever increasing DSP performance while keeping power consumption as low as possible.
To further improve performance of a digital system, two or more processors can be interconnected. For example, a DSP may be interconnected with a general purpose processor in a digital system. The DSP performs numeric intensive signal processing algorithms while the general purpose processor manages overall control flow. The two processors communicate and transfer data for signal processing via shared memory. A direct memory access (DMA) controller is often associated with a processor in order to take over the burden of transferring blocks of data from one memory or peripheral resource to another and to thereby improve the performance of the processor.
Modular programming builds a computer program by combining independently executable units of computer code (known as modules), and by tying modules together with additional computer code. Features and functionality that may not be provided by a single module may be added to a computer program by using additional modules.
The design of a computer programming unit known as a task (or function) is often accomplished through modular programming, where a specific task is comprised of one module and the additional computer code needed to complete the task (if any additional code is needed). However, a task may be defined as broadly as a grouping of modules and additional computer codes, or, as narrowly as a single assembly-type stepwise command.
A computer program may be processed (also called “run” or “executed”) in a variety of manners. One manner is to process the computer code sequentially, as the computer code appears on a written page or on a computer screen, one command at a time. An alternative manner of processing computer code is called task processing. In task processing, a computer may process computer code one task at a time, or may process multiple tasks simultaneously. In any event, when processing tasks, it is generally beneficial to process tasks in some optimal order.
Unfortunately, different tasks take different amounts of time to process. In addition, the result, output, or end point of one task may be required before a second task may begin (or complete) processing. Furthermore, particularly in a multiple processor environment, several tasks may need access to a common resource that has a generally fixed capacity.
Accordingly, there is needed a system and method for managing task processing that takes into account task processing times, resource capabilities and capacity, and other task processing needs.
SUMMARY OF THE INVENTION
Particular and preferred aspects of the invention are set out in the accompanying independent and dependent claims. In accordance with a first embodiment of the invention, there is provided a digital system having several processors and a shared resource that is accessed by the processors. Each processor has an access priority register that is loaded with an access priority value by software executing on the processor. Arbitration circuitry is connected to receive a request signal from each processor along with the access priority value from each access priority register. The arbitration circuitry is operable to schedule access to the shared resource according to the access priority values provided by the processors.
In another embodiment, a method is provided for prioritizing access to a shared resource in a digital system having several devices vying for access to the shared resource. A software state is established during execution of a sequence of instructions on each of the several devices. An instruction is executed on each device to form an access request to the shared resource. An access priority value is provided with each access request that is responsive to the software state of the respective device. Access to the shared device is scheduled by arbitration using the access priority values.
In another embodiment, the sequence of instructions is part of a task and the software state is established by defining a task priority for the task and setting the software state in accordance with the task priority.
In another embodiment, a first portion of the access priority value is formed in response to the software state, and a second portion of the access priority value is formed in response to a hardware state of the first device. The hardware state is responsive to an interrupt.
In another embodiment, the software state is saved during a context switch.
REFERENCES:
patent: 5168566 (1992-12-01), Kuki et al.
patent: 5339443 (1994-08-01), Lockwood
patent: 5506988 (1996-04-01), Weber et al.
patent: 5781862 (1998-07-01), Da Silva et al.
patent: 5884051 (1999-03-01), Schaffer et al.
Chauvel Gerard
Lasserre Serge
Auve Glenn A.
Brady III W. James
Marshall, Jr. Robert D.
Telecky , Jr. Frederick J.
Texas Instruments Incorporated
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