Target branch prediction using a plurality of tables

Electrical computers and digital processing systems: processing – Processing control – Branching

Reexamination Certificate

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C712S240000

Reexamination Certificate

active

07900026

ABSTRACT:
A system for predicting multiple targets for a single branch includes: a branch target buffer that includes a previous next address for an instruction and that receives an indirect instruction address to provide a first branch target prediction; a first branch table for capturing local past target information of an indirect branch in an encoded form; a second branch table which is a correlation table for storing potential branch targets based on a local branch history and which provides a second branch target prediction when the first branch target prediction is not successful; an exclusion predictor for inhibiting updates of inefficient entries; and a multiplexer to select the predicted target as output.

REFERENCES:
patent: 5758142 (1998-05-01), McFarling et al.
patent: 2003/0212882 (2003-11-01), Bonanno et al.
patent: 2004/0215720 (2004-10-01), Alexander et al.

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