Tapered through-silicon via structure

Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Grooved and refilled with deposited dielectric material

Reexamination Certificate

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C438S637000, C438S667000, C257SE21597

Reexamination Certificate

active

07816227

ABSTRACT:
An integrated circuit structure includes a substrate; a through-silicon via (TSV) in the substrate, the TSV being tapered; a hard mask region extending from a top surface of the substrate into the substrate, wherein the hard mask encircles a top portion of the TSV; dielectric layers over the substrate; and a metal post extending from a top surface of the dielectric layers to the TSV, wherein the metal post comprises same materials as the TSV.

REFERENCES:
patent: 5545581 (1996-08-01), Armacost et al.
patent: 6399472 (2002-06-01), Suzuki et al.
patent: 6448657 (2002-09-01), Dorleans
patent: 7264986 (2007-09-01), Gogoi
patent: 7589008 (2009-09-01), Kirby
patent: 2005/0017322 (2005-01-01), Gau et al.
patent: 2007/0262464 (2007-11-01), Watkins et al.
patent: 2009/0191708 (2009-07-01), Kropewnicki et al.

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