Tapered dielectric etch in semiconductor devices

Details Tapered dielectric etch in semiconductor devices Tapered dielectric etch in semiconductor devices

1997-10-21

1999-04-20

Mintel, William

Active solid-state devices (e.g., transistors, solid-state diode

Non-single crystal, or recrystallized, semiconductor...

Amorphous semiconductor material

257347, 257774, 438149, 438701, 438713, 438978, H01L 2701, H01L 2712, H01L 310392

Patent

active

058959378

ABSTRACT:
A method of etching openings in a dielectric layer of a semiconductor device by utilizing a novel etchant gas system of sulfur hexafluoride/chlorine such that sloped sidewalls can be formed in the openings having a desired taper of between about 20.degree. and about 85.degree. for achieving improved step coverage and profile control of the TFT fabrication process.

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Fujii, K., et al. Jpn. J. Appl. Phys. 31(I/12B) (Dec. 1992) 4574 "Process . . . LCDs addressed by a-Si TFTs".
Tokashiki, K., et al., Jpn. J. Appl. Phys 30(I/11B) (Nov. 1991) 3174 "Influence of halogen plasma atm. on SiO2 etching".
Pelletier, J., et al., J. Vac. Sci. Technol. B7(1) (Jan. 1989) 59 "Microwave plasma etching of Si and SiO2 in halogen . . . ".

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