Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Insulative housing or support
Reexamination Certificate
2001-07-11
2003-05-13
Paladini, Albert W. (Department: 2827)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Insulative housing or support
C438S107000, C438S011000, C438S011000, C438S001000, C438S124000, C438S126000
Reexamination Certificate
active
06562661
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to tape structures that are used in assemblies of semiconductor device components, such as the flexible dielectric tapes that are used in tape automated bonding (TAB) and tape ball grid array (TBGA) packages. Particularly, the tapes of the present invention have stiffeners, or support structures, thereon. More specifically, the present invention relates to tapes with stereolithographically fabricated stiffeners. The present invention also relates to assemblies of semiconductor device components that include the tapes of the present invention and to stereolithographic methods for fabricating stiffeners on the tapes.
2. State of the Art
TAPES USED WITH SEMICONDUCTOR DEVICE COMPONENTS
In some state of the art semiconductor devices, flexible dielectric tapes with electrical traces thereon are used to connect different semiconductor device components. As a first exemplary use of tapes in semiconductor devices, TAB employs flexible dielectric tapes with circuit traces thereon to electrically connect different semiconductor device components, such as dice and lead frames or circuit boards. In another example of the use of tape in semiconductor devices, a tape with circuit traces thereon may be used as an interposer in a TBGA package to reroute the outputs of a semiconductor device from the bond pad locations on a semiconductor die with which the tape is assembled to different contact pad locations on the tape to which conductive balls or bumps are mounted.
Tapes used in assemblies of semiconductor device components include a thin, flexible dielectric film with conductive traces and contact pads formed thereon. Typically, the dielectric films of such tapes are formed from polyimide or other suitable polymers. These films are usually only a few mils (e.g., 6 mils) thick to provide a desired amount of flexibility and to avoid a substantial increase in the overall thickness of an assembly of semiconductor device components that includes such an electrically connective tape. The conductive traces and contact pads on such films may be formed from a suitable conductive material, such as copper or aluminum.
Since these tapes are usually flexible, it is sometimes difficult to hold the tape in place to make the desired connections with a semiconductor device component. This is particularly true in TBGA packages, where torsional flexion and bending of the tape are undesirable during bonding of the contact pads of the tape to the bond pads of a semiconductor die. Bending of such tapes is also somewhat undesirable in TAB operations where a row of bond pads, other contact pads, or leads of a semiconductor device component are being bonded to an adjacent row of contact pads on the tape.
In response to these problems, thicker, less flexible tapes have been developed, as have tapes with heavier circuit traces that are positioned to counteract undesirable flexion or bending. Also, tapes that are to be used as interposers in TBGA packages are often supported by a rigid frame, such as a copper or aluminum frame, in order to prevent undesirable torsional flexion and bending of the tape during assembly with, and bonding to, one or more semiconductor dice. When the area of the TBGA interposer is relatively large compared to the area of the semiconductor die, these frames, or stiffeners, may remain in place on the tape so as to support the portions of the tape that extend laterally beyond the periphery of the semiconductor die. Stiffeners that remain in place with respect to the tape following connection of the tape to a semiconductor die are usually electrically isolated from the circuits of the TBGA package.
Exemplary TBGA tapes with metal stiffeners and packages including the same are disclosed in U.S. Pat. No. 6,002,169, issued to Chia et al. on Dec. 14, 1999; U.S. Pat. No. 5,844,168, issued to Schueller et al. on Dec. 1, 1998; U.S. Pat. No. 5,843,808, issued to Karnezos on Dec. 1, 1998; U.S. Pat. No. 5,663,530, issued to Schueller et al. on Sep. 2, 1997; U.S. Pat. No. 5,409,865, issued to Kamezos on Apr. 25, 1995; and U.S. Pat. No. 5,397,921, issued to Kamezos on Mar. 14, 1995.
As shown in
FIG. 1
, in the assembly of a carrier tape
14
to a semiconductor die to form a TBGA package, several TBGA tapes
14
are typically connected to one another in an elongate strip
10
, similar to a roll of photographic film. A semiconductor die is connected on its active surface to each TBGA tape
14
of elongate strip
10
. Prior to connecting a semiconductor die to the next, adjacent tape
14
, strip
10
is moved laterally. Typically, strip
10
includes sprocket or indexing holes
18
near the top and bottom edges
11
,
12
thereof to facilitate such lateral movement. Conventionally, the entire strip
10
of tapes
14
is carried on a metal (e.g., copper) stiffener or frame
1
. Following connection of a semiconductor die to a TBGA tape
14
, the semiconductor die-TBGA tape assembly, which forms a TBGA package, is severed from strip
10
.
While conventional metal stiffeners provide support to a tape to be used in a TBGA package, they only support the tape for purposes of connection to the semiconductor die and portions of the tape that extend laterally beyond the periphery of the semiconductor die. Thus, other portions of the tape that are prone to flexing or damage during assembly of the tape with a semiconductor die, such as the sprocket or indexing holes of a strip of TBGA tapes, are not reinforced. Due to the relative thinness and delicacy of these portions of the tape, however, such reinforcement is desirable.
STEREOLITHOGRAPHY
In the past decade, a manufacturing technique termed “stereolithography”, also known as “layered manufacturing”, has evolved to a degree where it is employed in many industries.
Essentially, stereolithography as conventionally practiced involves utilizing a computer to generate a three-dimensional (3-D) mathematical simulation or model of an object to be fabricated, such generation usually effected with 3-D computer-aided design (CAD) software. The model or simulation is mathematically separated or “sliced” into a large number of relatively thin, parallel, usually vertically superimposed layers, each layer having defined boundaries and other features associated with the model (and thus the actual object to be fabricated) at the level of that layer within the exterior boundaries of the object. A complete assembly or stack of all of the layers defines the entire object, and surface resolution of the object is, in part, dependent upon the thickness of the layers.
The mathematical simulation or model is then employed to generate an actual object by building the object, layer by superimposed layer. A wide variety of approaches to stereolithography by different companies has resulted in techniques for fabrication of objects from both metallic and nonmetallic materials. Regardless of the material employed to fabricate an object, stereolithographic techniques usually involve disposition of a layer of unconsolidated or unfixed material corresponding to each layer within the object boundaries, followed by selective consolidation or fixation of the material to at least a partially consolidated, or semi-solid, state in those areas of a given layer corresponding to portions of the object, the consolidated or fixed material also at that time being substantially concurrently bonded to a lower layer of the object to be fabricated. The unconsolidated material employed to build an object may be supplied in particulate or liquid form, and the material itself may be consolidated or fixed, or a separate binder material may be employed to bond material particles to one another and to those of a previously formed layer. In some instances, thin sheets of material may be superimposed to build an object, each sheet being fixed to a next-lower sheet and unwanted portions of each sheet removed, a stack of such sheets defining the completed object. When particulate materials are employed, resolution of object surfaces
Micro)n Technology, Inc.
Paladini Albert W.
TraskBritt PC
Zarneke David A.
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