Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip
Reexamination Certificate
2001-10-12
2004-03-23
Pert, Evan (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Flip chip
C257S780000, C257S781000, C257S787000, C257S737000, C257S738000, C257S668000, C257S795000
Reexamination Certificate
active
06710458
ABSTRACT:
BACKGROUND OF THE INVENTION
The present invention relates to a tape used for COF (chip on film) where a semiconductor element is mounted on a flexible circuit board, and to a semiconductor device formed with the tape for COF.
As a semiconductor device formed with a semiconductor element coupled to and mounted on a flexible circuit board, there has been known a TCP (Tape Carrier Package) semiconductor device. The TCP semiconductor device is provided with an insulating tape having a penetrating opening in which a semiconductor element is mounted, and a tip portion of an wiring pattern is coupled to the semiconductor element in a state that the wiring pattern is protruded like a cartilever. There has been another semiconductor device, as shown in
FIG. 15
, formed with a semiconductor element coupled to and mounted on a flexible circuit board. In this semiconductor device, a thin film insulating tape
1
does not have a penetrating opening in which a semiconductor element
2
is to be mounted, and a bump
3
of the semiconductor element
2
is coupled to and mounted on an inner lead
4
which is formed on the surface of the thin film insulating tape
1
. In addition, reference numeral
5
denotes a sealing resin, and
6
denotes a solder resist. Hereinafter, the latter semiconductor device is referred to as a COF semiconductor device.
In the COF, there is used the thin film insulating tape
1
which has foldability in consideration of its application. Each wire in an wiring pattern disposed on the surface of the thin film insulating tape
1
is electrically connected to a corresponding terminal of the semiconductor element
2
, and a connector section for external connection is connected to a liquid-crystal display panel, a printed circuit board and the like. Other exposed portions of the wiring pattern are insulated by a solder resist
6
applied thereon.
In the COF semiconductor device, as shown in
FIG. 15
, the semiconductor element
2
mounted on the thin film insulating tape
1
is sealed with a sealing resin
5
. If air is involved during resin sealing, air bubbles easily generate in the sealing resin since the thin film insulating tape
1
is not provided with an opening in which the semiconductor element
2
is to be mounted. During resin sealing, the sealing resin
5
is applied or injected along each side of the semiconductor element
2
. During application of the sealing resin
5
along four sides of the semiconductor element
2
, part of air present between the semiconductor element
2
and the thin film insulating tape
1
is sealed as air bubbles in the sealing resin
5
. It is difficult to completely prevent air bubbles from being generated in the sealing resin
5
.
In the semiconductor device where air bubbles are generated in the sealing resin for the semiconductor element
2
, the air bubbles contains moisture and the like which may cause any failure such as inter-terminal leakage.
At present, there are a demand for multiple pins of the COF semiconductor device and another demand for a smaller and thinner COF semiconductor device. In order to fulfill these requests at the same time, it is not only required that a connector section for external connection in an wiring pattern as well as a connection section to a semiconductor element should be more finely pitched, but also it is required that an insulating tape as well as an wiring pattern should be thinner. In order to make a pitch of an inner lead smaller, it is required that to make a width and a thickness of the inner lead smaller.
There are several subjects to be solved in obtaining the fine-pitched and thinner inner lead. One of the subjects is to improve resin sealability (resin filling) of the semiconductor element. Particularly, the fine-etched and thinner inner lead makes it more difficult to remove air bubbles, which are generated during resin sealing of a semiconductor element, from the sealing resin. Therefore, it is required in the fine-pitched and thinner inner lead to prevent air bubbles from being generated.
As a countermeasure against generation of air bubbles, an opening is provided in the thin film insulating tape as is the case with the above-stated TCP semiconductor device. Another countermeasure is shown in
FIG. 16
(
FIG. 15
is a cross sectional view taken in the line A-A′ of FIG.
16
). In
FIG. 16
, resin is applied along three sides shown with an arrow B or only one side shown with an arrow C of the semiconductor element
2
. Air present in a resin application region before resin application is removed through a non resin application region to the air.
However, the above-stared conventional countermeasures against air bubbles in the COF semiconductor devices have following subjects.
In the case of she former countermeasure where an opening is provided in the thin film insulating tape, sealing resin overflows from the opening of the thin film insulating tape to a lower part Thereof during the process of resin sealing. The overflowed sealing resin adheres to a stage, which leads to any manufacturing failure. In addition, the thus-manufactured COF semiconductor devices result in becoming thicker, which is against the recent demand for thinner semiconductor devices.
In the case of the latter countermeasure where resin is applied along three sides or only one side of the semiconductor element
2
as shown in
FIG. 16
, the sealing resin
5
flows at a higher velocity from a corner of the semiconductor element
2
, where an interval between inner leads becomes wider, to a space between the semiconductor element
2
and the insulating tape. This may result in taking air in the resin to generate air bubbles.
In addition, if the COF semiconductor device after installation is used in a temperature cycling environment where a low temperature and a high temperature are alternately repeated, thermal expansion and contraction are repeated due to the temperature cycling. Accordingly, due to difference in thermal expansion coefficient of materials, stress is generated around an edge of a solder resist opening which is provided for establishing electrical connection between the inner leads and the semiconductor element, which may cause disconnection of the inner leads.
Another problem involved in implementing a fine-pitched and thinner inner lead is that inner leads around the edge of the solder resist opening may be more remarkably disconnected in the temperature cycling because mechanical strength of the inner leads is decreased as a result of making the inner lead thinner. Therefore, for making the inner leads of the COF semiconductor device fine-pitched and thinner, mechanical strength of the inner lead section around the edge of the solder resist opening should be improved, which indicates that implementation of the fine-pitched device is difficult in the current state,
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a tape for COF and a semiconductor device therewith, which tape is capable of preventing air bubbles from being generated during resin sealing of a semiconductor element and capable of decreasing disconnection of an inner lead located at a corner of the semiconductor element.
In order to accomplish the above object, a first aspect of the present invention provides a tape for chip on film on which a semiconductor element is mounted and resin is applied for sealing the semiconductor element, the tape for chip on film comprising:
an insulating tape;
a plurality of wiring patterns formed on the insulating tape;
a solder resist partially covering the wiring patterns by application to have an opening; and
a dummy pattern provided at a corner of a region for the semiconductor element to be mounted so as to control flow of the resin from the corner to a space between a surface of the semiconductor element and the insulating tape during resin sealing.
The tape for chip on film according to the above constitution decreases a flow velocity of the resin flowing from the corner to the space between the surface of the semiconductor element and the insulating ta
Pert Evan
Thai Luan
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