Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Configuration or pattern of bonds
Reexamination Certificate
2007-02-27
2007-02-27
Parker, Kenneth (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Configuration or pattern of bonds
C257S668000, C257S782000, C257S785000, C349S152000, C349S151000, C349S150000, C438S118000, C445S024000
Reexamination Certificate
active
10949091
ABSTRACT:
A tape circuit substrate comprises a base film made of an insulating material, and a wiring pattern layer which is formed on the base film and has first leads that are connected to electrode pads arranged near a periphery of a semiconductor chip and second leads that are connected to electrode pads arranged near the center of the semiconductor chip. The semiconductor chip package comprises a semiconductor chip electrically bonded to the tape circuit substrate through chip bumps. In such a case, each of the leads is configured such that a tip end thereof to be bonded to the electrode pad has a width larger than that of a body portion thereof. According to the present invention, since the interval between the lead and the electrode pad can be made even narrower, a fine pitch semiconductor device can be realized.
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English language abstract of Japanese Publication No. 57-199228.
English language abstract of Japanese Publication No. 2003-007765.
English language abstract of Japanese Publication No. 2003-249592.
English language abstract of the Japanese Patent No. 9-55404.
English language abstract of the Japanese Patent No. 9-306946.
Kang Sa-Yoon
Kim Dong-Han
Lee Si-Hoon
Chu Chris
Marger & Johnson & McCollom, P.C.
Parker Kenneth
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