Tape ball grid array semiconductor

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – Insulating material

Reexamination Certificate

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C257S701000, C257S702000, C257S704000, C257S707000, C257S712000, C257S713000, C257S778000, C257S787000, C257S675000, C257S737000, C257S738000

Reexamination Certificate

active

06380620

ABSTRACT:

FIELD OF THE INVENTION
The present invention relates to a semiconductor device of a tape ball grid array (BGA) structure, as well as to a method for manufacturing the same.
BACKGROUND OF THE INVENTION
Recently, as multi-functionalization and high integration of semiconductor integrated circuits are promoted, semiconductor devices further smaller and thinner, with more pins, and further superior in heat radiation have been sought for. Therefore, semiconductor devices called BGAs have been attracting attentions, replacing QFPs (quade flat packages) and TCPs (tape carrier packages).
For example, the Japanese Publications for Laid-Open Patent Applications No. 88245/1996 (Tokukaihei 8-88245, Date of Publication: Apr. 2, 1996), No. 148526/1996 (Tokukaihei 8-148526, Date of Publication: Jun. 7, 1996), and No. 312374/1997 (Tokukaihei 9-312374, Date of Publication: Dec. 2, 1997) disclose BGA packages using TAB (tape automatic bonding) tapes.
FIG. 17
shows a tape BGA package disclosed in Tokukaihei 8-88245.
As shown in the same figure, a base film
51
as the TAB tape is provided with through holes
52
and a device hole
53
, as well as metal wires
54
on a surface thereof. An inner lead
54
a
of each metal wire
54
is uncovered in the device hole
53
(the inner lead
54
a
is formed so as to project from the base film
51
), and is subjected to inner lead bonding (ILB) with an electrode
55
a
of a semiconductor chip
55
. A sealing resin
56
is applied thereover, so as to coat an element-formed surface of the semiconductor chip
55
and the inner leads
54
a.
Lands (outer leads)
54
b
of the metal wires
54
and an external substrate
57
are connected to each other through solder balls
58
. Note that the metal wires
54
on the surface of the base film
51
, except portions thereof connected with the electrode
55
a
and portions thereof in contact with the solder balls
58
(hereinafter referred to as solder ball-bonded portions), are covered with a protective film
59
. In this manner, the BGA package of a thin film type applicable to a multi-pin structure.
Furthermore, a permeation hole
54
c
is formed in the land
54
b.
When the solder ball
58
is provided on the land
54
b
so as to form a bump, the solder ball
58
creeps up through the permeation hole
54
c
to the other side. Therefore, it is possible to check the state of soldering by visually checking the state of the creeping up. Furthermore, it is also possible to check electric characteristics, using the creeping up.
However, since the TAB-type BGA package typically arranged as shown in
FIG. 17
uses a TAB tape (base film
51
) as a substrate, the BGA package, though facilitating the formation of a multiple-port structure and the pitch narrowing, is inferior in coplanarity due to the solder balls
58
arranged on the base film
51
that is flexible, thereby causing non-uniformity in the connection between the metal wires
54
and the external substrate
57
by self-alignment. This results in that disconnection or defective connection occurs, thereby impairing the yield of the packages.
Then, another BGA package has been conventionally proposed, which is, as shown in
FIG. 18
, arranged as follows: a metal reinforcing plate
66
(equivalent to a stiffener, a lead frame, or the like) in a frame shape which has stiffness is applied on a surface of an insulating tape
61
as a TAB tape, the surface being on a side opposite to the external substrate-connected side. Here, a method for manufacturing a tape BGA package thus arranged is explained below.
First of all, as shown in FIGS.
19
(
a
) and
19
(
b
), inner leads
62
a
of metal wires
62
on the insulating tape
61
provided with a device hole
61
a,
and an electrode
63
a
of a semiconductor chip
63
are subjected to inner lead bonding. On the other hand, a protective film
64
is formed on the metal wire
62
on the insulating tape
61
except a portion thereof connected with the electrode
63
a
and the solder ball-bonded portions. Then, as shown in FIG.
19
(
c
), a sealing resin
65
is applied from a side of an element-formed surface of the semiconductor chip
63
, so as to coat and protect the element-formed surface and the inner leads
62
a.
Next, as shown in FIG.
19
(
d
), the frame-shaped metal reinforcing plate
66
is made to adhere to a back surface of the insulating tape
61
(a surface on a side opposite to the metal wire-formed side). Here, since the inner leads
62
a
are formed so as to project from the insulating tape
61
, if the metal reinforcing plate
66
is attached thereto before the resin sealing, the inner leads
62
are possibly deformed due to stress upon the attachment. To avoid this, the resin sealing is performed before the attachment of the metal reinforcing plate
66
as shown in FIGS.
19
(
c
) and
19
(
d
) so that the inner leads
62
are protected, and thus suppression of deformation of the inner leads
62
is attempted.
Then, as shown in FIG.
19
(
e
), the solder balls
68
for connecting outer leads
62
b
of the metal wires
62
to an external substrate
67
(see
FIG. 18
) are formed, thereby ensuring connection between the outer leads
62
b
and the external substrate
67
.
Such device manufacture process is continuously carried out with respect to a tape
69
composed of continuously arranged insulating tapes
61
, while the tape
69
is being sent out by reels
60
, so that the manufacture process with respect to each insulating tape
61
is continuously carried out. After the metal reinforcing plates
66
are applied, devices are cut out of the tape
69
unit by unit, one unit containing one chip or several chips.
Here, FIG.
21
(
a
) is a plan view of the foregoing tape BGA package obtained by viewing it from the external substrate side (note that the external substrate
67
and the sealing resin
65
are omitted), while FIG.
21
(
b
) is a plan view of the foregoing tape BGA package obtained by viewing it from the metal reinforcing plate
66
side. As shown in FIG.
21
(
a
), a plurality of the solder balls
68
are formed in, for example, a matrix form on the metal wire-formed side of the insulating tape
61
, while as shown in FIG.
21
(
b
), the metal reinforcing plate
66
in the frame shape is formed on the back surface of the insulating tape
61
.
This arrangement is more or less successful in ensuring coplanarity of the flexible insulating tape
61
and suppressing the warp of the package due to the effect of the metal reinforcing plate
66
, and accordingly, possible defects in the electric connection between the metal wires
62
and the external substrate
67
through the solder balls
68
are solved to some extent.
On the other hand, for example, the International Patent Application No. 507344/1997 (Tokuhyohei 9-507344, Date of Publication: Jul. 22, 1997, corresponding to WO96/12298), and the Japanese Publication for Laid-Open Patent Application No. 330994/1997 (Tokukaihei 9-330994, Date of Publication: Dec. 22, 1997) disclose a BGA package of a wire bonding type. As one example of the same,
FIG. 22
illustrates a BGA package disclosed by Tokuhyohei 9-507344.
As shown in the same figure, a semiconductor chip
72
is die-bonded to a center recessed part
71
a
of a lead frame (reinforcing plate)
71
with use of a die bonding paste
73
. To the surface of the lead frame
71
except the recessed part
71
a,
an insulating tape
75
having a conductive pattern
74
such as leads is made to adhere, with adhesive
76
. A bump
72
a
of the semiconductor chip
72
and inner leads
74
a
of the insulating tape
75
are wire-bonded by a gold wire
77
. The semiconductor chip
72
and the gold wire
77
are protected by sealing resin
78
. Outer leads
74
b
and the external substrate
79
are connected to each other through the solder balls
80
. Incidentally, the conductive pattern
74
on the surface of the insulating tape
75
, except portions thereof connected to the bumps
72
a
and the solder ball-bonded portions, is coated by the protective film
81
.
This arrangement, since having the lead fr

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