Tamper-resistant semiconductor device

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified configuration

Reexamination Certificate

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Details

C257SE23142, C257S211000, C257S679000, C257S758000, C326S008000, C438S253000

Reexamination Certificate

active

07547973

ABSTRACT:
The semiconductor device of the present invention includes: first defensive wiring provided above a diffusion isolation layer formed in a substrate or a well, arranged at a minimum wiring pitch allowable in fabrication to cover the diffusion isolation layer; a plurality of signal wiring layers formed above the first defensive wiring; and means for applying a predetermined signal to the first defensive wiring and capturing a change in an electrical or physical property of the first defensive wiring.

REFERENCES:
patent: 5168340 (1992-12-01), Nishimura
patent: 5783478 (1998-07-01), Chau et al.
patent: 5886943 (1999-03-01), Sekiguchi et al.
patent: 5986284 (1999-11-01), Kusaba et al.
patent: 6261883 (2001-07-01), Koubuchi et al.
patent: 6452283 (2002-09-01), Smola et al.
patent: 7007171 (2006-02-01), Butturini et al.
patent: 2003/0001210 (2003-01-01), Rittaku
patent: 2003/0205816 (2003-11-01), Janke
patent: 2004/0004231 (2004-01-01), Peng et al.
patent: 2004/0212017 (2004-10-01), Mizuno et al.
patent: 2002-529928 (2002-09-01), None
patent: WO 00/28399 (2000-05-01), None
Mori R et al.: “Superdistribution: The Concept and the Architecture” Transactions of the Institute of Electronics, information and Communication Engineers of Japan, vol. E73, No. 7, Jul. 1990, pp. 133-146, XP002010383.

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