Electrical computers and digital processing systems: memory – Address formation – Address mapping
Reexamination Certificate
2001-09-28
2004-10-05
Moazzami, Nasser (Department: 2187)
Electrical computers and digital processing systems: memory
Address formation
Address mapping
C711S006000, C711S220000
Reexamination Certificate
active
06801993
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Technical Field
The present invention generally relates to translation of virtual addresses to real addresses in a data processing system. More particularly, the present invention relates to the use of a table offset as part of the translation of a virtual address to a real address in a data processing system.
2. Background Informatiom
Data processing systems which use virtual addressing in multiple virtual address spaces are well known. Many data processing systems include, for example, a central processing unit (CPU) and a main storage. The CPU contains the sequencing and processing facilities for instruction execution, interruption action, timing functions, initial program loading and other machine related functions. The main storage is directly addressable and provides for high-speed processing of data by the CPU. The main storage may be either physically integrated with the CPU or constructed in stand-alone units.
In general, address spaces reside in main storage wherein an address space is a consecutive sequence of integer numbers (or virtual addresses), together with the specific transformation parameters which allow each number to be associated with a byte location in storage. The sequence starts at zero and proceeds left to right.
When a virtual address is used by a CPU to access main storage, it is first converted, by means of dynamic address translation (DAT), to a real address, and then, by means of prefixing, to an absolute address. DAT uses various levels of tables as transformation parameters. The designation (in the past, including origin and length) of a table is found for use by DAT in a control register or as specified by an access register.
DAT uses, at different times, the segment-table designations in different control registers or specified by the access registers. The choice is determined by the translation mode specified in the current program-status word (PSW). Four translation modes are available: primary-space mode, secondary-space mode, access-register mode (AR-mode), and home-space mode. Different address spaces are addressable depending on the translation mode.
Dynamic address translation (DAT) translates a virtual address of a computer system to a real address by means of translation tables. The bit string comprising a virtual address is divided, from left to right, into one or more table indexes and one byte index. The leftmost table index is multiplied by a table width and added to a predetermined table origin to form the address of an entry in the designated table. The next table index is multiplied by a table width and added to a table origin obtained from the entry in the first table to form the address of an entry in a second table. This process continues until all table indexes have been processed. The entry in the last table contains, instead of another table origin, a real address that is substituted for the concatenation of table indexes and concatenated with the byte index of the virtual address to form the real address resulting from the translation.
It has been the practice to include in the designation of the highest-level table and in each table entry that designates another table a field indicating the length of the designated table, at least when the table can be of significant size. A table-length field is a bit string of n bits. The leftmost n bits of an index are compared to the table-length bits for the corresponding table, and, if the value of the index bits is greater than the value of the table-length bits, the index is considered invalid and an exception is recognized (an interruption occurs) instead of proceeding with the translation. The table length has the advantage of saving storage that would be occupied by the unneeded end of a table.
However, it is sometimes the case that an address space is sparsely populated. One example is where an identifier of an object is used to form the address representation of that object in an address space. For example, if an object has an eight-character random name, the name could be used to form the address representation. It would be helpful in such situations to know where the necessary part of the designated table actually begins in order to save the storage that would otherwise be occupied by the unneeded beginning of the table.
Thus, a need exists for a way to indicate the actual beginning of a table in a virtual-to-real address translation.
SUMMARY OF THE INVENTION
Briefly, the present invention satisfies the need for a way to indicate the actual beginning of a table in a virtual-to-real address translation by providing a table offset.
The table offset field saves the storage at the beginning of the table that would otherwise be occupied by the table.
In accordance with the above, it is an object of the present invention to indicate an actual beginning of a table in the translation of a virtual address to a real address.
The present invention provides, in a first aspect, a method of translating a virtual address to a real address. The method comprises indexing into an entry of a first table based on a table origin and a table offset.
Systems and program products corresponding to the method of the first aspect are also provided in second and third aspects of the invention, respectively.
These, and other objects, features and advantages of this invention will become apparent from the following detailed description of the various aspects of the invention taken in conjunction with the accompanying drawings.
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Microsoft Press Computer Dictionary, 3rdEdition, 1997, p. 339.*
“z/Architecture—Principles of Operation,” IBM Publication No. SA22-7832-00 (Dec. 2000).
Chace Christian P.
Gonzalez, Esq. Floyd A.
Heslin Rothenberg Farley & & Mesiti P.C.
Moazzami Nasser
Reinke, Esq. Wayne F.
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