Table cloth matrix of EPROM memory cells with an asymmetrical fi

Details Table cloth matrix of EPROM memory cells with an asymmetrical fi Table cloth matrix of EPROM memory cells with an asymmetrical fi

1991-08-29

1993-03-23

LaRoche, Eugene R.

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257443, 257314, H01L 2978, H01L 2968

Patent

active

051969149

ABSTRACT:
A table cloth matrix of EPROM memory cells comprises a semiconductor substrate, parallel source lines and drain lines, floating gate areas interposed in a checkerboard pattern between the source lines and the drain lines and control gate lines, parallel to one another and perpendicular to the source lines and to the drain lines. There are obtained in the semiconductor substrate extensive oxide areas, with which the floating gates are in contact by means of their asymmetrical lateral fin.

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