TAB tape for semiconductor package

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Wire contact – lead – or bond

Reexamination Certificate

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Details

C257S785000, C257S786000

Reexamination Certificate

active

06853090

ABSTRACT:
A TAB tape for a semiconductor package is provided. The TAB tape provides number of test pad configuration for reducing the area of the test pad area on a TAB tape to increases the number of packages that may be prepared from a length of TAB tape. The TAB tape comprises a base film having a chip mounting area for mounting at least one semiconductor device and a wiring pattern formed on the base film with test pads formed at the ends of the output terminal patterns. A predetermined number of the test pads are arranged in rows form a group wherein the number of rows is less than the number of test pads in the group. Groups of the test pads are consecutively arranged across the TAB tape to provide the number of test pads necessary for testing the semiconductor device(s).

REFERENCES:
patent: 5343366 (1994-08-01), Cipolla et al.
patent: 5378581 (1995-01-01), Vernon
patent: 5726860 (1998-03-01), Mozdzen
patent: 5734559 (1998-03-01), Banerjee et al.
patent: 5818252 (1998-10-01), Fullman et al.
patent: 5895977 (1999-04-01), Banerjee
patent: 05-251501 (1993-09-01), None

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