Sysyem and method providing selective write protection for indiv

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area

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711104, 711152, 711163, 365195, 36518901, 36518905, 36523003, 36523005, 36523006, 36523008, 365239, G06F 1200

Patent

active

058025839

ABSTRACT:
A system and method for selective write protection for a non-volatile memory device which comprises a superset of the existing JEDEC 21-C standard and in which user definable portions of a non-volatile memory device can be write protected instead of only the entire device. The write-protection technique of the present invention can be selectably enabled or disabled dynamically as determined by a user. Moreover, the system and method of the present invention provides for storage of the device write-protection configuration in non-volatile memory in order that the device can be restored to its last known write-protection state in the event it is powered down or the current configuration is otherwise lost.

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patent: 5604881 (1997-02-01), Thomas
patent: 5666760 (1997-09-01), Hazen
patent: 5673222 (1997-09-01), Fukumoto et al
Electronic Industries Association Engineering Department, JEDEC Standard No. 21-C Release 6, Configurations for Solid Sate Memories, Jan. 1996, pp.1-1--4-97.
Ramtron International Corporation, FM1608S FRAM.RTM. Memory, Feb. 1994, pp.3-8.
Ramtron International Corporation; FRAM Memory Products 1996 Databook pp. 1-17 to 1-25;FM1808S.RTM. FRAM Memory, 262.144-Bit Nonvolatile Ferroelectric RAM Product Preview.

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