Systolic array processors for reducing under-utilization of orig

Details Systolic array processors for reducing under-utilization of orig Systolic array processors for reducing under-utilization of orig

1991-04-10

1994-05-31

Bowler, Alyssa H.

Coded data generation or conversion

Digital code to digital code converters

Tree structure

341101, 364229, 3642293, 3642713, 3649315, 36493101, 364DIG2, G06F 300, G06F 700

Patent

active

053177550

ABSTRACT:
A method of transforming systolic arrays using bit-parallel arithmetic into arrays using digit-serial arithmetic is described. Digit-serial computation is an area-time efficient method of doing high-speed arithmetic calculations, having the advantage through appropriate choice of digit and word size of allowing throughput capacity to be matched to design needs. For a certain class of systolic arrays, however, digit-serial arithmetic allows a further very significant benefit, by transforming arrays in which processors are under-utilized into arrays with 100% processor utilization. As an example, converting a well-known band-matrix multiplication array to use digit-serial processing is calculated to give an improvement of more than three times in area-time efficiency.

REFERENCES:
patent: 4337518 (1982-06-01), Ohnishi et al.
patent: 4377806 (1983-03-01), Elliott et al.
patent: 4517659 (1985-05-01), Chamberlain
patent: 4794627 (1988-12-01), Grimaldi
patent: 4799152 (1989-01-01), Chuang et al.
patent: 4799182 (1989-01-01), Marwood
patent: 4910700 (1990-03-01), Hartley et al.
patent: 4942396 (1990-07-01), Hartley et al.
patent: 5025257 (1991-06-01), Hartley et al.
patent: 5034908 (1991-07-01), Hartley et al.
patent: 5105424 (1992-04-01), Flaig et al.
P. F. Corbett and R. I. Hartley, "Use of Digit-Serial Computational in Systolic Arrays" pp. 1-4, May 90, IEEE International Symposium on CKT & System.
H. T. Kung "Why Systolic Architectures", IEEE, vol. 15, No. 1, Jan. 1982.
Corbett P. and R. I. Hartley, "Designing Systolic Arrays Using Digit-Serial Arithmetic" Jan. '92, IEEE Transaction on CKT & System II vol. 39.
P. Corbett, "Application of Digit-Serial Processing to Systolic Arrays", Apr. 18, 1988 Princeton University.

Affiliated with

Also associated with

Rating

Systolic array processors for reducing under-utilization of orig does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Systolic array processors for reducing under-utilization of orig, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Systolic array processors for reducing under-utilization of orig will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-1635340