Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition
Reexamination Certificate
2011-08-23
2011-08-23
Yu, Jae U (Department: 2185)
Electrical computers and digital processing systems: memory
Storage accessing and control
Specific memory composition
C710S049000, C711S104000, C711S161000, C711S162000, C714S006230
Reexamination Certificate
active
08006033
ABSTRACT:
Embodiments of the invention are generally directed to systems, methods, and apparatuses for in-band data mask bit transmission. In some embodiments, one or more data mask bits are integrated into a partial write frame and are transferred to a memory device via the data bus. Since the data mask bits are transferred via the data bus, the system does not need (costly) data mask pin(s). In some embodiments, a mechanism is provided to enable a memory device (e.g., a DRAM) to check for valid data mask bits before completing the partial write to the DRAM array.
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Intel Corporation
Pedigo Philip A.
Yu Jae U
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