Computer graphics processing and selective visual display system – Computer graphics display memory system – Addressing
Reexamination Certificate
2011-07-26
2011-07-26
Tung, Kee M (Department: 2628)
Computer graphics processing and selective visual display system
Computer graphics display memory system
Addressing
C711S153000, C711S209000
Reexamination Certificate
active
07986327
ABSTRACT:
Embodiments of the present invention set forth a technique for optimizing the on-chip data path between a memory controller and a display controller within a graphics processing unit (GPU). A row selection field and a sector mask are included within a memory access command transmitted from the display controller to the memory controller indicating which row of data is being requested from memory. The memory controller responds to the memory access command by returning only the row of data corresponding to the requested row to the display controller over the on-chip data path. Any extraneous data received by the memory controller in the process of accessing the specifically requested row of data is stripped out and not transmitted back to the display controller. One advantage of the present invention is that the width of the on-chip data path can be reduced by a factor of two or more as a result of the greater operational efficiency gained by stripping out extraneous data before transmitting the data to the display controller.
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Office Action, U.S. Appl. No. 11/555,628, mailed Nov. 30, 2009.
Nvidia Corporation
Patterson & Sheridan LLP
Perromat Carlos
Tung Kee M
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