Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Reexamination Certificate
2005-03-01
2005-03-01
Whitmore, Stacy A. (Department: 2812)
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
Reexamination Certificate
active
06862715
ABSTRACT:
A process is shown for determining crossover current in a circuit design. One or more static CMOS gates are identified within the circuit design. One or more widths of at least one of a P-stack and N-stack associated with the CMOS gates are then determined. A voltage slope at the input of, and a capacitive load at the output of, one or more of the nodes are also determined. Crossover current, per static CMOS gate, is estimated based on the widths, the voltage slope and capacitive load. An overall crossover current is determined by summing individual gate-level crossover currents. The circuit design may be optimized for power consumption, for example, by modifying design elements of the circuit design while monitoring overall crossover current.
REFERENCES:
patent: 20030177452 (2003-09-01), Chen
patent: 20030177460 (2003-09-01), Chen
Biggi Matthew
Burden David C.
Weisberg Jaime
Hewlett--Packard Development Company, L.P.
Whitmore Stacy A.
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