Static information storage and retrieval – Read/write circuit – Erase
Reexamination Certificate
2011-06-28
2011-06-28
Le, Vu A (Department: 2824)
Static information storage and retrieval
Read/write circuit
Erase
C365S185290, C365S148000, C365S230010
Reexamination Certificate
active
07969806
ABSTRACT:
An integrated circuit includes memory segments, each having at least one memory cell configurable in first and second states to store data, and a controller that controls programming and erasing of the memory segments. The controller maps external memory addresses of write data to internal memory addresses of erased memory segments with no memory cells in the first state such that erased memory segments are programmed with write data. When a write access occurs for an external memory address previously mapped to an internal memory address of a programmed memory segment with at least one memory cell in the first state, the controller remaps the external memory address to another internal memory address of an erased memory segment. The controller identifies programmed memory segments to be erased and controls selective erasure of the identified programmed memory segments, such as programmed memory segments no longer mapped to an external memory address.
REFERENCES:
patent: 5805520 (1998-09-01), Anglada et al.
patent: 2005/0223186 (2005-10-01), Belevich et al.
patent: 2006/0187701 (2006-08-01), Liaw
patent: 2007/0183223 (2007-08-01), Aritome
De Ambroggi Luca
Egerer Jens
Schroegmeier Peter
Edell Shapiro & Finnan LLC
Le Vu A
Qimonda AG
Yang Han
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