Systems and methods for testing integrated circuit devices

Details Systems and methods for testing integrated circuit devices Systems and methods for testing integrated circuit devices

2008-06-09

2010-12-07

Charioui, Mohamed (Department: 2857)

Data processing: measuring, calibrating, or testing

Testing system

Of circuit

C714S025000, C714S718000, C714S734000, C714S742000, C702S117000, C375S225000, C370S241000, C324S537000

Reexamination Certificate

active

07848899

ABSTRACT:
Embodiments described herein relate to systems and methods for testing integrated circuit devices within an environment that is representative of the application environment in which an integrated circuit device will be used. In at least one embodiment, the testing system comprises a second reference integrated circuit device that provides flexibility in testing, allowing only the input to a first reference integrated circuit device of an application system to be tapped and not necessarily both input to and output from the first reference integrated circuit device to be tapped. In some embodiments, the input to the first reference integrated circuit device may be subsequently modified by a controller. The controller is configured to tap first test data transmitted to the first reference integrated circuit device of the application system, and transmit second test data to both the second reference integrated circuit device and at least one integrated circuit device under test, the second test data comprising at least a portion of the first test data. Reference response data received from the second reference integrated circuit device may then be compared with output from the at least one integrated circuit device under test.

REFERENCES:
patent: 4001818 (1977-01-01), Radichel et al.
patent: 4379259 (1983-04-01), Varadi et al.
patent: 4484329 (1984-11-01), Slamka et al.
patent: 4821238 (1989-04-01), Tatematsu
patent: 4965799 (1990-10-01), Green et al.
patent: 5224107 (1993-06-01), Mattes
patent: 5375228 (1994-12-01), Leary et al.
patent: 5619430 (1997-04-01), Nolan et al.
patent: 5619926 (1997-04-01), Engelmann et al.
patent: 5720031 (1998-02-01), Lindsay
patent: 5794175 (1998-08-01), Conner
patent: 5844913 (1998-12-01), Hassoun et al.
patent: 5937367 (1999-08-01), Eckardt
patent: 5940875 (1999-08-01), Inagaki et al.
patent: 5959914 (1999-09-01), Gates et al.
patent: 5995424 (1999-11-01), Lawrence et al.
patent: 5995915 (1999-11-01), Reed et al.
patent: 6002623 (1999-12-01), Stave et al.
patent: 6014759 (2000-01-01), Manning
patent: 6018484 (2000-01-01), Brady
patent: 6029262 (2000-02-01), Medd et al.
patent: 6055653 (2000-04-01), LeBlanc et al.
patent: 6055661 (2000-04-01), Luk
patent: 6058055 (2000-05-01), Brunelle
patent: 6134690 (2000-10-01), Ivaturi et al.
patent: 6178526 (2001-01-01), Nguyen et al.
patent: 6275962 (2001-08-01), Fuller et al.
patent: 6313657 (2001-11-01), Hashimoto
patent: 6324665 (2001-11-01), Fay
patent: 6327556 (2001-12-01), Geiger et al.
patent: 6345372 (2002-02-01), Dieckmann et al.
patent: 6389525 (2002-05-01), Reichert et al.
patent: 6425095 (2002-07-01), Yasui
patent: 6430720 (2002-08-01), Frey et al.
patent: 6452411 (2002-09-01), Miller et al.
patent: 6546511 (2003-04-01), Sim et al.
patent: 6574759 (2003-06-01), Woo et al.
patent: 6615379 (2003-09-01), Tripp et al.
patent: 6646936 (2003-11-01), Hamamatsu et al.
patent: 6701474 (2004-03-01), Cooke et al.
patent: 6731125 (2004-05-01), Chang
patent: 6754117 (2004-06-01), Jeddeloh
patent: 6851076 (2005-02-01), Cook, III et al.
patent: 6880118 (2005-04-01), Chen et al.
patent: 6888366 (2005-05-01), Kim et al.
patent: 6910146 (2005-06-01), Dow
patent: 6996749 (2006-02-01), Bains et al.
patent: 7085980 (2006-08-01), Martin-De-Nicolas et al.
patent: 7088122 (2006-08-01), Hartmann et al.
patent: 7092902 (2006-08-01), Eldridge et al.
patent: 7119567 (2006-10-01), Ma et al.
patent: 7131046 (2006-10-01), Volkerink et al.
patent: 7142003 (2006-11-01), Kanbayashi et al.
patent: 2007/0140025 (2007-06-01), Chan et al.
patent: WO 0229824 (2002-04-01), None
Hermann A L, “Diagnostic Data Comparator”, IBM Technical Disclosure Bulletin, IBM Corp. New York, US, vol. 24, No. 5, Oct. 1, 1981, pp. 2591-2592.
U.S. Appl. No. 11/611,390, “Method and Apparatus for Testing a Fully Buffered Memory Module”, filed Dec. 15, 2006 (Abandoned). (Retrievable from PAIR).

Affiliated with

Also associated with

Rating

Systems and methods for testing integrated circuit devices does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Systems and methods for testing integrated circuit devices, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Systems and methods for testing integrated circuit devices will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-4236246