Electrical computers and digital processing systems: memory – Storage accessing and control – Control technique
Utility Patent
1997-12-19
2001-01-02
Cabeca, John W. (Department: 2752)
Electrical computers and digital processing systems: memory
Storage accessing and control
Control technique
C711S112000, C714S006130
Utility Patent
active
06170044
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention is directed, in general, to process control systems and, more specifically, to a process control system, and method of operating the same, providing synchronization between a primary controller and a secondary controller with minimum control disruption of the primary controller.
BACKGROUND OF THE INVENTION
Many process facilities (e.g., a manufacturing plant, a mineral or crude oil refinery, etc.) are managed using distributed control systems. Typical contemporary control systems include numerous modules tailored to monitor and/or control various processes of the facility. Conventional means link these modules together to produce the distributed nature of the control system. This affords increased performance and a capability to expand or reduce the control system to satisfy changing facility needs.
Process facility management providers, such as Honeywell, Inc., develop control systems that can be tailored to satisfy wide ranges of process requirements (e.g., global, local or otherwise) and facility types (e.g., manufacturing, warehousing, refining, etc.). Such providers have two principil objectives. The first objective is to centralize control of as many processes as possible to improve an overall efficiency of the facility. The second objective is to support a common interface that communicates data among various modules controlling or monitoring the processes, and also with any such centralized controller or operator center.
Each process, or group of associated processes, has one or more input characteristics (e.g., flow, feed, power, etc.) and one or more output characteristics (e.g., temperature, pressure, etc.) associated with it. Model predictive control (“MPC”) techniques have been used to optimize certain processes as a function of such characteristics. One MPC technique uses algorithmic representations of certain processes to estimate characteristic values (represented as parameters, variables, etc.) associated with the processes that can be used to better control such processes. In recent years, physical, economic and other factors have been incorporated into control systems for these associated processes.
Examples of such techniques are described in U.S. Pat. No. 5,351,184, entitled “Method of Multivariable Predictive Control Utilizing Range Control;” U.S. Pat. No. 5,561,599, entitled “Method of Incorporating Independent Feedforward Control in a Multivariable Predictive Controller; ” U.S. Pat. No. 5,572,420, entitled “Method of Optimal Controller Design of Multivariable Predictive Control Utilizing Range Control;” and U.S. Pat. No. 5,574,638, entitled “Method of Optimal Scaling of Variables in a Multivariable Predictive Controller Utilizing Range Control,” all of which are commonly owned along by the assignee of the present invention and incorporated herein by reference for all purposes (the foregoing issued patents are collectively referred to hereafter as the “Honeywell Patents”).
The distributed control systems used to monitor and control a process are frequently linked by common communication pathways, such as by a local area network (LAN) architecture or by a wide area network (WAN) architecture. When a requesting node needs a datum from a responding node, it issues a request for the datum across the network and the responding node then returns the datum back across the network. Many process control systems use a supervisory control LAN or WAN integrated with one or more process control networks. The process control networks contain the basic raw data required by the supervisory control network and other process control networks.
Typically, a supervisory controller is linked to a flexible array of process controllers using communication drivers matched to the specific process controller being interfaced. The supervisory controller maps the essential data of these process controllers into a homogeneous database controlled by the supervisory controller for consistent storage and access by individual process controller or by any client application being executed by the supervisory controller.
To increase the overall reliability of a process facility, redundant process controllers are frequently implemented. A typical implementation is a 1:1 redundancy between a primary process controller and a secondary process controller. In routine operation, the primary process controller controls a selected process, gathers process data (such as temperature, pressure, etc.) from the controlled process, and relays the process data to the supervisory controller and other process controllers. The secondary process controller remains quiescent with respect to control and parameter access, but must be synchronized (or updated) with information from the primary process controller so that the secondary process controller can immediately take over from the primary process controller in the event of a failure of the primary process controller.
However, synchronization of the primary process controller and its associated secondary process controller in many of the prior art systems is an awkward process. In many prior art systems, after a secondary process controller comes on-line, the controlled process is frequently stalled for a period of several to many seconds while the contents of the memory of the primary process controller is transferred to the memory of the secondary process controllers. In many systems, this is an unacceptable condition, since one or more of the client process controllers may require that the most current value of a process datum from another server process controller be immediately available at all times.
In advanced process control systems, control data must be supplied to a process or to other controllers at very high refresh rates. Primary process controllers in these systems have very short base control cycles, typically less than 100 milliseconds. If the time required to update data in the secondary process controller is too great, one or more base control cycles of the primary process controller may be skipped in order to complete the data transfer to the secondary process controller. This also is frequently unacceptable.
There is therefore a need in the art for improved process controllers that provide one or more client applications with faster access to information. In particular, there is a need in the art for improved redundant process controllers that allow the secondary process controller to seamlessly assume control of a process after the failure of the primary process controller. More particularly, there is need in the art for improved redundant process controllers that allow the secondary process controller to be updated with process data from the primary controller without interrupting a foreground operation being performed by the primary process controller.
SUMMARY OF THE INVENTION
To address the above-discussed deficiencies of the-prior art, the present invention provides a system for maintaining data coherency between a primary process controller operable to execute process control tasks and a backup process controller operable to replace the primary process controller upon failure, wherein the primary process controller cyclically executes the process control tasks during base control cycles having a period, T. The system comprises: 1) a tracking circuit operable to detect changed data in a main memory in the primary process controller; 2) a data buffer for temporarily storing the changed data; and 3) data transfer circuitry for transferring the changed data in the data buffer to a backup memory in the backup process controller at least once during each base control cycle of the primary process controller, such that the transfer of changed data does not interfere with execution of the process control tasks.
In one embodiment of the present invention, the data buffer is sufficiently small to allow the transfer of changed data to be completed within the base control cycle.
In another embodiment of the present invention, the tracking circuit detects write operations in the main memory
McLaughlin Paul Francis
Swanson Norman Raymond
Bataille Pierre-Michel
Cabeca John W.
Honeywell Inc.
Munck William A.
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