Systems and methods for operating logic circuits

Electronic digital logic circuitry – Function of and – or – nand – nor – or not – Field-effect transistor

Reexamination Certificate

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C326S055000, C327S407000, C327S408000

Reexamination Certificate

active

07030658

ABSTRACT:
Systems and methods for reducing the power consumption of some combinations of logic gates by reducing the number of unnecessary transitions that are made by logic gates that do not affect the output of the logic. In one embodiment, a modified exclusive-OR (XOR) gate is coupled to a modified multiplexer. The XOR gate has two inputs, Ainand Bin, and an output, XORout, which is provided as an input to the multiplexer. Another input to the multiplexer is Cin. A select signal is input to the multiplexer to select either Cinor XORoutto be provided at the output of the multiplexer. If XORoutis selected, the XOR gate operates in a first mode in which it functions as a normal XOR gate. If Cinis selected, the XOR gate operates in a second mode in which the XOR gate uses less power than when the XOR gate operates normally.

REFERENCES:
patent: 5410194 (1995-04-01), Freidin et al.
patent: 6529040 (2003-03-01), Carberry et al.
patent: 2004/0236814 (2004-11-01), White

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