Systems and methods for memory retention across resets

Details Systems and methods for memory retention across resets Systems and methods for memory retention across resets

2011-03-01

2011-03-01

Le, Dieu-Minh (Department: 2114)

Error detection/correction and fault detection/recovery

Data processing system error or fault handling

Reliability and availability

C714S733000

Reexamination Certificate

active

07900090

ABSTRACT:
Systems and methods (“utility”) for providing a computer system with a mechanism to record live data on a continuous basis which may be analyzed subsequent to a fault condition is provided. The utility uses the existing DRAM memory of a computer system as a retentive DRAM (RDRAM) device that may be used to store the data. To accomplish this, software and firmware is provided for continuously refreshing the DRAM memory across resets that are due to fault conditions. Further, non-maskable interrupts (NMI) are used to flag a variety of fault conditions to the computer system. To make the utility platform independent, a standardized power and configuration interface is used to implement a computer system reset that preserves the contents of the RDRAM.

REFERENCES:
patent: 5465367 (1995-11-01), Reddy et al.
patent: 2001/0012230 (2001-08-01), Takemae et al.
patent: 2003/0200382 (2003-10-01), Wells et al.
patent: 2007/0255895 (2007-11-01), Mangione-Smith
patent: 2007/0255896 (2007-11-01), Mangione-Smith

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