Systems and methods for increasing transaction entries in a...

Details Systems and methods for increasing transaction entries in a... Systems and methods for increasing transaction entries in a...

2006-09-26

2006-09-26

Peugh, Brian R. (Department: 2187)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S173000, C711S128000

Reexamination Certificate

active

07114054

ABSTRACT:
Systems and methods for increasing transaction entries in a hardware queue of the type having a fixed number of storage elements. One of a plurality of transaction entries in one of the storage elements is accessed through at least one pointer having one or more first bits that identify the one element and one or more second bits that identify the one transaction entry within the one element. Information that is part of the one transaction entry is modified when the one transaction entry is accessed from the one storage element.

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Affidavit of Richard W. Adkisson, Feb. 17, 2005, 4 pages.

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