Systems and methods for generating test vectors to analyze...

Details Systems and methods for generating test vectors to analyze... Systems and methods for generating test vectors to analyze...

2006-05-02

2006-05-02

Dinh, Paul (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000

Reexamination Certificate

active

07039886

ABSTRACT:
Systems, software products and methods generate test vectors to analyze cells of electronic gates. A cell of a cell library is electronically selected. Input combinations of stimuli for the cell are determined. One or more input combinations are removed that do not affect maximum and minimum signal propagation timing through the cell. Test vectors for the cell are generated based upon remaining input combinations.

REFERENCES:
patent: 5345393 (1994-09-01), Ueda
patent: 6042613 (2000-03-01), Tsukamoto
patent: 6075932 (2000-06-01), Khouja et al.
patent: 2002/0100006 (2002-07-01), Kosugi

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