Systems and methods for conducting future signal checks

Details Systems and methods for conducting future signal checks Systems and methods for conducting future signal checks

2007-04-24

2007-04-24

Chiang, Jack (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

10838761

ABSTRACT:
In one embodiment, a system and method pertain to identifying an output signal having indeterminate timing, creating an expectation for a signal change associated with the output signal, and adding the expectation to an ordered list of expectations for the output signal. In another embodiment, a system and method pertain to detecting a signal change, identifying a vector associated with the signal in which the change occurred, examining pending expectations of the vector until a mature expectation is identified, comparing an expected value contained in the mature expectation with the detected signal change, and reporting an error if the expected value does not match the detected signal change.

REFERENCES:
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patent: 6487704 (2002-11-01), McNamara et al.
patent: 6948092 (2005-09-01), Kondo et al.
Tseng et al., Static Noise Analysis with Noise Window, Jun. 2003, ACM, pp. 864-868.
Chen et al., Refining Switching Window by Time Slots for Crosstalk Noise Calculation, 2002, IEEE, pp. 583-586.

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