Electrical computers and digital processing systems: memory – Storage accessing and control – Hierarchical memories
Reexamination Certificate
2006-08-15
2006-08-15
Padmanabhan, Mano (Department: 2188)
Electrical computers and digital processing systems: memory
Storage accessing and control
Hierarchical memories
C711S129000, C711S160000, C709S219000
Reexamination Certificate
active
07093073
ABSTRACT:
A mechanism for caching Web services requests and responses, including testing an incoming request against the cached requests and associated responses is provided. The requests are selectively tested against the cached data in accordance with a set of policies. If a request selected hits in the cache, the response is served up from the cache. Otherwise, the request is passed to the corresponding Web-services server/application. Additionally, a set of predetermined cache specifications for generating request identifiers may be provided. The identifier specification may be autonomically adjusted by determining cache hit/cache miss ratios over the set of identifier specifications and over a set of sample requests. The set of specifications may then be sorted to reflect the performance of the respective cache specification algorithms for the current mix of requests.
REFERENCES:
patent: 6772203 (2004-08-01), Feiertag et al.
patent: 2002/0156979 (2002-10-01), Rodriguez
patent: 2004/0054860 (2004-03-01), Dixit et al.
Doan Duc T
International Business Machines - Corporation
Padmanabhan Mano
Rodriguez Herman
Winstead Sechrest & Minick P.C.
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