Electrical computers and digital processing systems: memory – Address formation – Combining two or more values to create address
Reexamination Certificate
2008-06-10
2008-06-10
Bragdon, Reginald (Department: 2189)
Electrical computers and digital processing systems: memory
Address formation
Combining two or more values to create address
C711S001000, C711S214000
Reexamination Certificate
active
07386702
ABSTRACT:
Systems and methods are provided for accessing thread private data in a computer. In one embodiment, a method is provided for accessing thread private data in a computer for a program executed by using a plurality of threads, wherein each of the plurality of threads may be associated with a different area of its respective stack for storage of thread private data. Further, the stacks of threads may cover a coherent address space in a memory of the computer, starting at a base address. The method may include determining a thread identifier of the one of the plurality of threads based on the base address and a stack pointer of one of the plurality of threads. In addition, the method may include accessing thread private data of one of the stacks based on the determined thread identifier.
REFERENCES:
patent: 5511192 (1996-04-01), Shirakihara
patent: 5727178 (1998-03-01), Pletcher et al.
patent: 6654781 (2003-11-01), Browning
patent: 6915408 (2005-07-01), Huras
patent: 2002/0059503 (2002-05-01), Dennie
International Preliminary Report on Patentability, dated Aug. 5, 2003 (7 pages).
Bragdon Reginald
Finnegan Henderson Farabow Garrett & Dunner LLP
Flournoy Horace L.
SAP (AG)
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