Error detection/correction and fault detection/recovery – Pulse or data error handling – Memory testing
Reexamination Certificate
2010-10-13
2011-10-18
Trimmings, John (Department: 2117)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Memory testing
C714S719000, C714S025000, C714S030000, C714S042000, C714S054000, C714S733000, C714S734000, C714S736000, C714S742000, C341S143000, C341S144000, C365S185230, C365S201000, C365S185210
Reexamination Certificate
active
08042012
ABSTRACT:
Disclosed are methods, systems and devices, such as a device including a data location, a quantizing circuit coupled to the data location, and a test module coupled to the quantizing circuit. The quantizing circuit may include an analog-to-digital converter, a switch coupled to the memory element and a feedback signal path coupled to the output of the analog-to-digital converter and to the switch.
REFERENCES:
patent: 5600319 (1997-02-01), Ginetti
patent: 5614856 (1997-03-01), Wilson et al.
patent: 5953276 (1999-09-01), Baker
patent: 6044019 (2000-03-01), Cernea et al.
patent: 6188340 (2001-02-01), Matsumoto et al.
patent: 6282120 (2001-08-01), Cernea et al.
patent: 6490200 (2002-12-01), Cernea et al.
patent: 6504750 (2003-01-01), Baker
patent: 6567297 (2003-05-01), Baker
patent: 6661708 (2003-12-01), Cernea et al.
patent: 6664708 (2003-12-01), Shlimak et al.
patent: 6741502 (2004-05-01), Cernea
patent: 6769081 (2004-07-01), Parulkar
patent: 6781906 (2004-08-01), Perner et al.
patent: 6785156 (2004-08-01), Baker
patent: 6795359 (2004-09-01), Baker
patent: 6798705 (2004-09-01), Baker
patent: 6813208 (2004-11-01), Baker
patent: 6822892 (2004-11-01), Baker
patent: 6826102 (2004-11-01), Baker
patent: 6829188 (2004-12-01), Baker
patent: 6847234 (2005-01-01), Choi
patent: 6850441 (2005-02-01), Mokhlesi et al.
patent: 6856564 (2005-02-01), Baker
patent: 6870784 (2005-03-01), Baker
patent: 6901020 (2005-05-01), Baker
patent: 6914838 (2005-07-01), Baker
patent: 6930942 (2005-08-01), Baker
patent: 6954390 (2005-10-01), Baker
patent: 6954391 (2005-10-01), Baker
patent: 6985375 (2006-01-01), Baker
patent: 7002833 (2006-02-01), Hush et al.
patent: 7009901 (2006-03-01), Baker
patent: 7068206 (2006-06-01), Augusto et al.
patent: 7095667 (2006-08-01), Baker
patent: 7102932 (2006-09-01), Baker
patent: 7133307 (2006-11-01), Baker
patent: 7362610 (2008-04-01), Salter et al.
patent: 7372717 (2008-05-01), Baker
patent: 7508725 (2009-03-01), Sugiura et al.
patent: 7672803 (2010-03-01), Lee et al.
patent: 2002/0101758 (2002-08-01), Baker
patent: 2002/0194557 (2002-12-01), Park
patent: 2003/0039162 (2003-02-01), Baker
patent: 2003/0043616 (2003-03-01), Baker
patent: 2003/0067797 (2003-04-01), Baker
patent: 2003/0198078 (2003-10-01), Baker
patent: 2003/0214868 (2003-11-01), Baker
patent: 2004/0008555 (2004-01-01), Baker
patent: 2004/0032760 (2004-02-01), Baker
patent: 2004/0062100 (2004-04-01), Baker
patent: 2004/0076052 (2004-04-01), Baker
patent: 2004/0095839 (2004-05-01), Baker
patent: 2004/0190327 (2004-09-01), Baker
patent: 2004/0190334 (2004-09-01), Baker
patent: 2004/0199710 (2004-10-01), Baker
patent: 2004/0240294 (2004-12-01), Baker
patent: 2005/0002249 (2005-01-01), Baker
patent: 2005/0007803 (2005-01-01), Baker
patent: 2005/0007850 (2005-01-01), Baker
patent: 2005/0013184 (2005-01-01), Baker
patent: 2005/0018477 (2005-01-01), Baker
patent: 2005/0018512 (2005-01-01), Baker
patent: 2005/0041128 (2005-02-01), Baker
patent: 2005/0088892 (2005-04-01), Baker
patent: 2005/0088893 (2005-04-01), Baker
patent: 2005/0201145 (2005-09-01), Baker
patent: 2006/0013040 (2006-01-01), Baker
patent: 2006/0062062 (2006-03-01), Baker
patent: 2006/0227641 (2006-10-01), Baker
patent: 2006/0250853 (2006-11-01), Taylor et al.
Rane Corporation, RaneNote 137, “Digital Charma of Audio A/D Converters,” 1997, 12 pgs.
Baker, R.J., (2001-2006)Sensing Circuits for Resistive Memory, presented at various universities and companies.
Baker, “CMOS Mixed Signal Circuit Design,” IEEE Press, A. John Wiley & Sons, Inc.; Copyright 2003, Figures 30.63, 31.82, 32.6, 32.7, 32.24, 32.51, 33.34, 33.47, 33.51, 34.18, 34.24; located at http://cmosedu.com/cmos2/book2.htm.
Dallas Semiconductor, Maxim Application Note 1870, “Demystifying Sigma-Delta ADCs,” (Jan. 31, 2003), 15 pgs.
Baker, R.J., (2003)Mixed-Signal Design in the Microelectronics Curriculum, IEEE University/Government/Industry Microelectronics (UGIM) Symposium, Jun. 30-Jul. 2, 2003.
Baker, R.J. (2004)Delta-Sigma Modulation for Sensing, IEEE/EDS Workshop on Microelectronics and Electron Devices(WMED), Apr. 2004.
Baker, “CMOS Circuit Design, Layout, and Simulation,” Second Edition, IEEE Press, A. John Wiley & Sons, Inc.; Copyright 2005; Chapters 13, 16, 17, 20, 22-24, 28-29; pp. 375-396, 433-522, 613-656, 711-828, 931-1022.
Hadrick, M. and Baker, R.J., (2005)Sensing in CMOS Imagers using Delta-Sigma Modulation, a general presentation of our work in this area.
Baker, R.J. (2005)Design of High-Speed CMOS Op-Amps for Signal Processing, IEEE/EDS Workshop on Microelectronics and Electron Devices(WMED), Apr. 2005.
Leslie, M.B., and Baker, R.J., (2006) “Noise-Shaping Sense Amplifier for MRAM Cross-Point Arrays,” IEEE Journal of Solid State Circuits, vol. 41, No. 3, pp. 699-704.
Duvvada, K., Saxena, V., and Baker, R. J., (2006)High Speed Digital Input Buffer Circuits, proceedings of the IEEE/EDS Workshop on Microelectronics and Electron Devices (WMED), pp. 11-12, Apr. 2006.
Saxena, V., Plum, T.J., Jessing, J.R., and Baker, R. J., (2006)Design and Fabrication of a MEMS Capacitive Chemical Sensor System, proceedings of the IEEE/EDS Workshop on Microelectronics and Electron Devices (WMED), pp. 17-18, Apr. 2006.
Baker, R.J. and Saxena, V., (2007)Design of Bandpass Delta Sigma Modulators: Avoiding Common Mistakes, presented at various universities and companies.
Wikipedia—definition of “Error detection and correction”, pulled from website Jun. 1, 2007, 9 pgs.
Wikipedia—definition of “Hamming code”, pulled from website Jun. 1, 2007, 8 pgs.
Wikipedia—definition of “Linear feedback shift register (LFSR),” pulled from website Jun. 1, 2007, 4 pgs.
Park, “Motorola Digital Signal Processors—Principles of Sigma-Delta Modulation for Analog-to-Digital Converters,” (Undated).
Fletcher Yoder
Micro)n Technology, Inc.
Trimmings John
LandOfFree
Systems and devices including memory with built-in self test... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Systems and devices including memory with built-in self test..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Systems and devices including memory with built-in self test... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4277496