Computer-aided design and analysis of circuits and semiconductor – Nanotechnology related integrated circuit design
Patent
1998-11-06
2000-11-14
Lintz, Paul R.
Computer-aided design and analysis of circuits and semiconductor
Nanotechnology related integrated circuit design
716 8, G06F 1750
Patent
active
061484334
ABSTRACT:
In some embodiments, the invention includes a method of regularity extraction including generating a set of templates for a circuit through computer automated operations on a description of the circuit. The method also includes covering the circuit with instances of a subset of the templates. In some embodiments, the set of templates includes single-principal output templates, where a single-principal output templates is a template in which all outputs of the template are in the transitive fanin of a particular output of the template. The set of templates may also include tree templates. In some embodiments, the set of templates is a complete set of templates given certain assumptions including that the set of templates include all maximal templates of involved classes of templates and a template is not generated through permuting gate inputs. In some embodiments, the covering of the circuit involves selecting one of the set of templates and meeting certain criteria and deleting all nodes in instances of the selected template. The covering may further include deleting the templates in the set of templates other than the selected templates and regenerating a new set of templates from the remaining uncovered circuit.
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Chowdhary Amit
Gupta Rajesh K.
Kale Sudhakar S. J.
Saripella Phani K.
Sehgal Naresh K.
Aldous Alan K.
Intel Corporation
Lintz Paul R.
Thompson Annette M.
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