System to reduce particulate contamination

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of...

Reexamination Certificate

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C438S791000, C414S172000, C414S225010, C118S500000

Reexamination Certificate

active

06355577

ABSTRACT:

FIELD
This invention relates to the field of semiconductor wafer processing. More particularly the invention relates to a system for reducing particulate contamination of wafers during low-pressure chemical vapor deposition processing.
BACKGROUND
During fabrication, a semiconductor wafer typically undergoes several types of processing steps that involve thermal processing, such as oxidation, diffusion, annealing, and deposition, such as low pressure chemical vapor deposition. The semiconductor industry utilizes wafer carriers, also referred to as wafer boats, for holding the wafers during such process steps that involve thermal processing. Typically, a wafer boat supports a wafer by contacting the wafer at spaced-apart locations around the wafer's edge, thereby maximizing the amount of surface area on the wafer that is exposed during processing and minimizing the surface area contact between the wafer boat and the wafer. Generally, wafer boats are designed to carry several wafers in a spaced-apart parallel arrangement.
Since the wafer boat carries the wafer during deposition process steps, materials that are deposited onto the wafer during the process steps are generally also deposited onto the wafer boat. Some of these deposited materials have thermal expansion coefficients that are significantly different from the thermal expansion coefficient of the wafer boat. During many of the processing steps, the wafers and the wafer boat are exposed to relatively rapid temperature changes. Due to the differences in the rates of thermal expansion between the wafer boat and the deposited materials, thermal stresses are created in the deposited materials. If the deposited materials do not adhere well to the boat, the thermal stresses can lead to spalling of the deposited material. The spalling causes particles of the deposited material to fly off of the boat, and impact and adhere to the wafers, thereby introducing defects to the wafers.
What is needed, therefore, is a system for thermally processing wafers in a manner that does not contaminate the wafers with particulate matter that is created when deposited materials spall from the wafer carrier.
SUMMARY
The above and other needs are met by a method for depositing a film on a surface of a semiconductor wafer while preventing formation of defects on the surface of the wafer. The method includes selecting a quartz wafer carrier for holding the semiconductor wafer during the depositing of the film, where the wafer carrier has quartz rods with fire-polished slots for receiving an edge of the semiconductor wafer. The slots of the selected wafer carrier extend into the quartz rods to a slot depth, and have surfaces that are fire-polished to a polished depth within the slots. The method also includes placing the semiconductor wafer into the quartz wafer carrier with the edge of the wafer disposed within the fire-polished slots, and loading the wafer carrier and the wafer into a deposition chamber. The method further includes evacuating air from the deposition chamber, heating the wafer carrier and the wafer to a deposition temperature, adjusting pressure within the deposition chamber to a deposition pressure, and introducing process gases to the deposition chamber. By reaction of the process gases, the film is deposited on the surface of the wafer and on the wafer carrier.
Using a wafer carrier with fire-polished slots provides increased adhesion of the deposited film to the wafer carrier. The increased adhesion prevents spalling of the film off of the wafer carrier which causes particles of the film to impact the wafer held in the carrier. Such particle impacts introduce defects to the wafer which would render either the wafer or the devices on the wafer unusable.
Thus, using a fire-polished wafer carrier according to the present invention introduces significantly fewer defects to a wafer than does using a non-fire-polished wafer carrier. Therefore, use of the present invention reduces both the number of rejected wafers and the number of rejected devices, thereby saving production time and money.
A preferred embodiment of the invention includes selecting a wafer carrier having fire-polished slots with a polished depth of at least 6 percent of the slot depth, where the slot surfaces have a surface roughness of no greater than about 50 micro inches within the polished depth.
An alternate embodiment of the invention includes selecting a wafer carrier having fire-polished slots with a polished depth of at least about 30 percent of the slot depth and a highly-polished depth of at least about 13 percent of the slot depth, where the slot surfaces have a surface roughness of no greater than about 35 micro inches within the polished depth, and no greater than about 15 micro inches within the highly-polished depth.
In some preferred embodiments of the invention, the depositing step includes depositing a silicon nitride film on the semiconductor wafer.
In other preferred embodiments, the method includes coating the wafer carrier with a silicon nitride film prior to placing the semiconductor wafer into the quartz wafer carrier.
Some preferred embodiments include heating the wafer carrier and the wafer to a deposition temperature of between about 710 degrees C. and about 805 degrees C., and adjusting the pressure within the deposition chamber to a deposition pressure of between about 0.1 Torr and about 0.2 Torr.
In another aspect, the invention provides a wafer produced according to the method described above.
In a further aspect, the invention provides a semiconductor device produced according to the method described above.
In yet another aspect, the invention provides a wafer carrier for holding a semiconductor wafer during deposition of a film on a surface of the wafer in a low-pressure chemical vapor deposition process. The wafer carrier of the present invention provides for increased adhesion of film material that is deposited on the wafer carrier during the deposition process, thereby preventing spalling of the film material which can cause particles of the film material to impact the wafer and introduce defects to the wafer. The wafer carrier includes multiple quartz rods, each having multiple spaced-apart substantially parallel slots that extend into the rod to a slot depth. The slots are substantially perpendicular to a center axis of the rod, and have fire-polished slot surfaces. The carrier includes a structure for rigidly supporting the quartz rods with their center axes disposed substantially in parallel, thereby defining a cylindrical frame.
In preferred embodiments of the invention, the fire-polished slots of the carrier have a polished depth of at least about 6 percent of the slot depth, and the slot surfaces have a surface roughness of no greater than about 50 micro inches within the polished depth.
In other embodiments, the fire-polished slots have a polished depth of at least about 30 percent of the slot depth and a highly-polished depth of at least about 13 percent of the slot depth. Within the polished depth, the slot surfaces have a surface roughness of no greater than about 35 micro inches, and within the highly-polished depth, the slot surfaces have a surface roughness of no greater than about 15 micro inches.
In another aspect, the invention provides a wafer produced using the wafer carrier described above.
In a further aspect, the invention provides a semiconductor device produced using the wafer carrier described above.


REFERENCES:
patent: 4355974 (1982-10-01), Lee
patent: 4515104 (1985-05-01), Lee
patent: 4518349 (1985-05-01), Tressler et al.
patent: 4653636 (1987-03-01), Armstrong
patent: 4770590 (1988-09-01), Hugnes et al.
patent: 4853204 (1989-08-01), Azuma et al.
patent: 4981222 (1991-01-01), Lee
patent: 4993559 (1991-02-01), Cota
patent: 5322539 (1994-06-01), Mathisen et al.
patent: 5665135 (1997-09-01), Izumitani
patent: 5711781 (1998-01-01), Lysson et al.
patent: P2000-127020 (2000-05-01), None

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