System protection map

Electrical computers and digital processing systems: memory – Storage accessing and control – Shared memory area

Reexamination Certificate

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Details

C711S163000, C710S200000

Reexamination Certificate

active

06775750

ABSTRACT:

FIELD OF THE INVENTION
This invention generally relates to microprocessors, and more specifically to improvements in memory access protection circuits, systems, and methods of making.
BACKGROUND OF THE INVENTION
Microprocessors are general-purpose processors that provide high instruction throughputs in order to execute software running thereon, and can have a wide range of processing requirements depending on the particular software applications involved. Many different types of processors are known, of which microprocessors are but one example. For example, Digital Signal Processors (DSPs) are widely used, in particular for specific applications, such as mobile processing applications. DSPs are typically configured to optimize the performance of the applications concerned and to achieve this they employ more specialized execution units and instruction sets. Particularly in applications such as mobile telecommunications, but not exclusively, it is desirable to provide ever-increasing DSP performance while keeping power consumption as low as possible.
To further improve performance of a digital system, two or more processors can be interconnected. For example, a DSP may be interconnected with a general-purpose processor in a digital system. The DSP performs numeric intensive signal processing algorithms while the general-purpose processor manages overall control flow. The two processors communicate and transfer data for signal processing via shared memory. A direct memory access (DMA) controller is often associated with a processor in order to take over the burden of transferring blocks of data from one memory or peripheral resource to another and to thereby improve the performance of the processor.
An operating system (OS) is generally provided to manage the digital system by controlling resources and scheduling execution of various program modules or tasks. In a system with several processors, it may be convenient to have a separate OS for each processor. Generally an OS assumes that it is in control of all system resources. Many OSs were not designed in a manner to share memory and resources with another OS. Therefore, when two or more OSs are combined in a single system, resource allocation problems may occur. Conflicts over use of memory or peripheral devices may have dire consequences for system operation.
SUMMARY OF THE INVENTION
It has now been discovered that the OSs must cooperate in partitioning the system, either statically or dynamically. A system protection map (SPM) can then be used to ensure that the agreed upon partitioning is actually followed. An SPM doesn't necessarily supplant memory management facilities that are present on a given processor, but rather provides an additional level of protection in order to protect operation systems from each other.
In general, and in a form of the present invention, a method is provided for operating a digital system having a plurality of initiator resources including a plurality of processors connected to a shared memory subsystem. Two or more of the processors execute separate operating systems. In order to control access to shared resources, a plurality of regions within an address space of the memory subsystem is defined. Initiator resource access rights are assigned to at least a portion of the plurality of regions to indicate which initiator resource is allowed to access each region. Using the address provided with the access request, the region being accessed by a memory access request is identified. During each access request, the source of the request is identified using a resource identification value provided with each access request and then a determination is made of whether the initiator resource accessing the identified region has access rights for the identified region. Access to the identified region is allowed to a initiator resource only if the initiator resource has access rights to the identified region.
In another embodiment of the present invention, a digital system is provided with several processors connected to access a shared memory subsystem. Resource identification means is connected to the plurality of processors for indicating which of the plurality of processors is requesting access to the shared memory subsystem. Protection circuitry is connected to receive a resource identification value from the resource identification means in response to an access request to the shared memory subsystem. The protection circuitry is operable to inhibit access to the shared memory in response to the resource identification value.


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