Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2007-11-13
2007-11-13
Baderman, Scott (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S025000, C714S031000, C714S051000
Reexamination Certificate
active
10856278
ABSTRACT:
The present invention is directed to a system-on-chip development apparatus for wire/wireless Internet telephone. The system-on-chip development apparatus for wire/wireless Internet telephone according to the present invention adds functions indispensable to a RISC core, constructs a core kernel section using a device integrating additional FPGAs available to support additional functions, and provides a plurality of interfaces necessary to an Internet telephone function centering around the core kernel section. With this, the number of necessary component parts can be minimized to facilitate design and simplify the configuration thereof.
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Hwang Dae-Hwan
Kim Bong-Tae
So Woon-Seob
Baderman Scott
Blakely & Sokoloff, Taylor & Zafman
Electronics and Telecommunications Research Institute
Manoskey Joseph D
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