System-on-a-Chip structure having a multiple channel bus bridge

Details System-on-a-Chip structure having a multiple channel bus bridge System-on-a-Chip structure having a multiple channel bus bridge

2006-01-10

2006-01-10

Vo, Tim (Department: 2112)

Electrical computers and digital data processing systems: input/

Intrasystem connection

Bus interface architecture

C710S306000

Reexamination Certificate

active

06985988

ABSTRACT:
A system-on-a-chip integrated circuit structure includes a bridge having a plurality of channels, a processor local bus connected to the bridge (wherein the bridge includes a first channel dedicated to the processor local bus), at least one logic device connected to the processor local bus, a peripheral device bus connected to the bridge (wherein the bridge includes a second channel dedicated to the peripheral device bus), at least one peripheral device connected to the peripheral device bus, at least one memory unit connected to the bridge (wherein the bridge includes a third channel dedicated to the memory unit), and at least one input/output unit connected to the bridge (wherein the bridge includes a fourth channel dedicated to the input/output unit).

REFERENCES:
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patent: 5761516 (1998-06-01), Rostoker et al.
patent: 5838684 (1998-11-01), Wicki et al.
patent: 5842031 (1998-11-01), Barker et al.
patent: 5872942 (1999-02-01), Swanstrom et al.
patent: 6035364 (2000-03-01), Lambrecht et al.
patent: 6047350 (2000-04-01), Dutton et al.

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