Electrical computers and digital data processing systems: input/ – Intrasystem connection – System configuring
Reexamination Certificate
2004-07-02
2008-08-26
Hafiz, Tariq R. (Department: 2182)
Electrical computers and digital data processing systems: input/
Intrasystem connection
System configuring
C710S305000, C710S306000, C710S311000
Reexamination Certificate
active
07418534
ABSTRACT:
A system on a chip for network devices. In one implementation, the system on a chip may include (integrated onto a single integrated circuit), a processor and one or more I/O devices for networking applications. For example, the I/O devices may include one or more network interface circuits for coupling to a network interface. In one embodiment, coherency may be enforced within the boundaries of the system on a chip but not enforced outside of the boundaries.
REFERENCES:
patent: 4433378 (1984-02-01), Leger
patent: 4463424 (1984-07-01), Mattson et al.
patent: 4760571 (1988-07-01), Schwarz
patent: 5279087 (1994-01-01), Mann
patent: 5640399 (1997-06-01), Rostoker et al.
patent: 5668809 (1997-09-01), Rostoker et al.
patent: 5778414 (1998-07-01), Winter et al.
patent: 5802287 (1998-09-01), Rostoker et al.
patent: 5829025 (1998-10-01), Mittal
patent: 5887187 (1999-03-01), Rostoker et al.
patent: 5893150 (1999-04-01), Hagersten et al.
patent: 5908468 (1999-06-01), Hartmann
patent: 5914955 (1999-06-01), Rostoker et al.
patent: 5974508 (1999-10-01), Maheshwari
patent: 6018763 (2000-01-01), Hughes et al.
patent: 6098064 (2000-08-01), Pirolli et al.
patent: 6111859 (2000-08-01), Godfrey et al.
patent: 6122667 (2000-09-01), Chung
patent: 6151662 (2000-11-01), Christie
patent: 6157623 (2000-12-01), Kerstein
patent: 6202125 (2001-03-01), Patterson et al.
patent: 6202129 (2001-03-01), Palanca et al.
patent: 6209020 (2001-03-01), Angle et al.
patent: 6215497 (2001-04-01), Leung
patent: 6223239 (2001-04-01), Olarig
patent: 6262594 (2001-07-01), Cheung et al.
patent: 6266797 (2001-07-01), Godfrey et al.
patent: 6269427 (2001-07-01), Kuttanna et al.
patent: 6332179 (2001-12-01), Okpisz et al.
patent: 6349365 (2002-02-01), McBride
patent: 6366583 (2002-04-01), Rowett et al.
patent: 6373846 (2002-04-01), Daniel et al.
patent: 6438651 (2002-08-01), Slane
patent: 6484224 (2002-11-01), Robins et al.
patent: 6574708 (2003-06-01), Hayter et al.
patent: 6633967 (2003-10-01), Duncan
patent: 6636906 (2003-10-01), Sharma et al.
patent: 2001/0021949 (2001-09-01), Blightman et al.
patent: 2003/0038809 (2003-02-01), Peng et al.
patent: 02253532.2 (2005-07-01), None
patent: 00/30322 (2000-05-01), None
patent: 00/52879 (2000-09-01), None
SiByte, “Target Applications,” http://sibyte.com/mercurian/applications.htm, Jan. 15. 2001, 2 pages.
SiByte, “SiByte Technology,” http://sibyte.com/mercurian/technology.htm, Jan. 15, 2001, 3 pages.
SiByte, “The Mercurian Processor,” http://sibyte.com/mercurian, Jan. 15, 2001, 2 pages.
SiByte, “Fact Sheet,” SB-1 CPU, Oct. 2000, rev. 0.1, 1 page.
SiByte, “Fact Sheet,” SB-1250, Oct. 2000, rev. 0.2, 10 pages.
Stepanian, SiByte, SiByte SB-1 MIPS64 CPU Core, Embedded Processor Forum 2000, Jun. 13, 2000, 15 pages.
Jim Keller, “The Mercurian Processor: A High Performance, Power-Efficient CMP for Networking,” Oct. 10, 2000, 22 pages.
Tom R. Halfhill, “SiByte Reveals 64-Bit Core For NPUs; Independent MIPS64 Design Combines Low Power, High Performance,” Microdesign Resources, Jun. 2000, Microprocessor Report, 4 pages.
“PowerPC 601,” RISC Microprocessor User's Manual, Revision 1, Motorola, Inc. 1993, p. 8-14.
Intel, “Pentium Processor Family User's Manual,” vol. 1: Pentium Processor Family Data Book, 1994, pp. 5-23 and 5-50.
Pentium® Pro Family Developer's Manual, vol. 1:Specifications, Chapter 4, pp. 1-18, 1996.
“Atlas I: A Single-Chip, Gigabit ATM Switch with HIC/HS Links and Multi-Lane Back-Pressure,” Katevenis, et al., IPC Business Press Ltd., Long, GB, vol. 21, No. 7-8, Mar. 30, 1998, XP004123981, 5 pages.
“An Introductory VHDL Tutorial: Chapter 1—An Introduction and Background,” 1995, Green Mountain Computing Systems, XP002212233, 2 pages.
Cho James Y.
Hayter Mark D.
Rowlands Joseph B.
Broadcom Corporation
Garlick & Harrison & Markison
Hafiz Tariq R.
Sun Scott
LandOfFree
System on a chip for networking does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with System on a chip for networking, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and System on a chip for networking will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4012263