System of and method for flow control within a tag pipeline

Details System of and method for flow control within a tag pipeline System of and method for flow control within a tag pipeline

2005-07-12

2005-07-12

Padmanabhan, Mano (Department: 2188)

Electrical computers and digital processing systems: memory

Storage accessing and control

Control technique

C370S229000

Reexamination Certificate

active

06918021

ABSTRACT:
A controller comprising a pipeline including a plurality of connected sequential elements wherein a first sequential element is connected to one or more transaction sources; a flow control logic including at least one resource utilization value register; resource allocation logic responsive to a transaction valid signal and one or more adjustment inputs, and comparison logic having a threshold value and a transaction control signal output connected to the one or more transaction sources; pipeline control logic having an adjustment output connected to the resource allocation logic; and a resource control logic having an output connected to an adjustment input of the resource allocation logic.

REFERENCES:
patent: 4392200 (1983-07-01), Arulpragasam et al.
patent: 5649154 (1997-07-01), Kumar et al.
patent: 5649157 (1997-07-01), Williams
patent: 5701292 (1997-12-01), Chiussi et al.
patent: 5913049 (1999-06-01), Shiell et al.
patent: 6014732 (2000-01-01), Naffziger
patent: 6038651 (2000-03-01), VanHuben et al.
patent: 6049851 (2000-04-01), Bryg et al.
patent: 6393550 (2002-05-01), Fetterman et al.
patent: 6400684 (2002-06-01), Benmohamed et al.
patent: 6754772 (2004-06-01), Crook et al.
patent: 6810475 (2004-10-01), Tardieux
patent: 2003/0005263 (2003-01-01), Eickemeyer et al.
patent: 2003/0158992 (2003-08-01), Ajanovic et al.
Chiussi et al., “Dynamic max rate control algorithm for available bit rate service in ATM networks”, 1996. GLOBECOM '96, vol. 3, 18-22, pp.: 2108-2117.
Chiussi et al., “Backpressure in shared-memory-based ATM switches under multiplexed bursty sources”, Mar. 1996, INFOCOM '96, vol.: 2, 24-28 pp.: 830-843.
Hamaoka et al., “Optimized Feedback Design for Backpressure-Based Fairness Control” May 2002, High Performance Switching and Routing, pp.: 219-223.
DeBlasi, Mario. “Computer Architecture,” Addison-Wesley Publishing Company. New York (1990) pp. 273-291.
Tabak, Daniel. “Advanced Microprocessors,” McGraw-Hill, Inc. New York (1991) pp. 244-248.
Papamarcos, Mark et al. “A Low Overhead Coherence Solution for Multiprocessors With Pivate Cache Memories,” IEEE. (1984) pp. 348-354.
Stone High Performance Computer Architecture, Addison-Wesley, 2nd Ed. (1990) pp. 29-39.

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