Error detection/correction and fault detection/recovery – Data processing system error or fault handling – Reliability and availability
Reexamination Certificate
2006-04-04
2006-04-04
Beausoliel, Robert (Department: 2113)
Error detection/correction and fault detection/recovery
Data processing system error or fault handling
Reliability and availability
C714S025000, C714S039000, C700S026000
Reexamination Certificate
active
07024588
ABSTRACT:
A system monitoring unit uses an external debugging unit to monitor the state of an internal CPU when a control program stored in a memory of a target system controls an internal CPU of the system to operate via an internal bus of the system. The system monitoring unit includes an internal-bus-address comparing circuit for detecting, in real time, based on information on the internal bus, information on the accessing of the internal bus by the internal CPU. By outputting the information on the accessing of the internal bus by the internal CPU to the debugging unit, the system monitoring unit can output the state of the internal bus while controlling the internal CPU to operate.
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Machine Translation of Japanese Patent 11-282713 from the Japanese Patent Office Website.
English Translation of FR 2748833 A1, “Information Storage System for Real Time Monitoring of a Digital Computer”.
Amano Mitsuyasu
Imai Kenichiro
Beausoliel Robert
Frommer William S.
Frommer & Lawrence & Haug LLP
Manoskey Joseph D
Presson Thomas F.
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